Log inRegister an accountBrowse CSDbHelp & documentationFacts & StatisticsThe forumsAvailable RSS-feeds on CSDbSupport CSDb Commodore 64 Scene Database
 Welcome to our latest new user kingligger ! (Registered 2018-02-23) You are not logged in 
CSDb User Forums


Forums > C64 Coding > TIL: The instruction after SEI can be executed before a pending IRQ is handled
2017-11-07 16:56
Krill

Registered: Apr 2002
Posts: 932
TIL: The instruction after SEI can be executed before a pending IRQ is handled

As described here: http://visual6502.org/wiki/index.php?title=6502_Timing_of_Inter..

I never knew this, after all those years, and thought i'd share this as a heads-up.

Thanks to bubis for pointing it out to me!
 
... 89 posts hidden. Click here to view all posts....
 
2017-11-10 13:30
Krill

Registered: Apr 2002
Posts: 932
Since the succeeding opcode is merely fetched, and not executed, then the pipeline flushed and the interrupt handled, then the opcode re-fetched and finally executed...
I can only imagine some arcane anti-cracking/debugging/reverse-engineering setup there, nothing demo-worthy.
2017-11-11 03:23
TWW

Registered: Jul 2009
Posts: 420
Morale of the story is:

SEI/CLI your init. take care of unwanted IRG/NMI events from smegging up your shit. Let the byte optimizers optimize^^
2017-11-11 05:05
ChristopherJam

Registered: Aug 2004
Posts: 746
Quoting TWW
Morale of the story is:

SEI/CLI your init.


You appear to have forgotten the word "don't"

Just use MagerValp's routine from comment 26, and you'll be fine. SEI/CLI does nothing but create a problem that requires additional handling.
2017-11-11 05:09
ChristopherJam

Registered: Aug 2004
Posts: 746
Quoting Krill
Since the succeeding opcode is merely fetched, and not executed, then the pipeline flushed and the interrupt handled, then the opcode re-fetched and finally executed...
I can only imagine some arcane anti-cracking/debugging/reverse-engineering setup there, nothing demo-worthy.


Yes, you'd have to be running code stored in read-sensitive IO registers, at the precise cycle an IRQ is expected. I find it hard to imagine any kind of scenario where that would save you any cycles or memory.
2017-11-11 07:59
Oswald

Registered: Apr 2002
Posts:
Quote: Quoting TWW
Morale of the story is:

SEI/CLI your init.


You appear to have forgotten the word "don't"

Just use MagerValp's routine from comment 26, and you'll be fine. SEI/CLI does nothing but create a problem that requires additional handling.


good luck with that when an irq midst your interrupt setup interferes with your initialization.
2017-11-11 08:09
lft

Registered: Jul 2007
Posts: 323
The only interrupt source that is enabled at program start is CIA1. And we disable all CIA1 interrupts. So where would the interference come from again?
2017-11-11 08:58
Oswald

Registered: Apr 2002
Posts:
Quote: The only interrupt source that is enabled at program start is CIA1. And we disable all CIA1 interrupts. So where would the interference come from again?

assumption is the root of all bugs. if you change enviroment you're facing hrs of debugging until you find the faulty non sei/cli irq setup, that relies on having the system in a known state.
2017-11-11 09:38
Oswald

Registered: Apr 2002
Posts:
anyhow I realise this is a religious argument, everyone should just do it as he likes. doesnt really matter.
2017-11-11 10:48
ChristopherJam

Registered: Aug 2004
Posts: 746
Oswald, if there's a source you don't know about to disable, you're going to have bugs regardless of whether you SEI/CLI or not, as it's going to hit while your code isn't expecting it.

And if you do know about it, you can disable it, in which case an SEI before you disable it will create extra work for you, or an SEI after you disable it will do nothing.

Either way all you are doing is adding extra bytes to your init code with zero improvements to reliability.

It may even cause your raster interrupt to have it's first occurrence on the wrong line altogether, which can occasionally produce a frame of garbage at the start of your routine.
2017-11-11 11:28
Groepaz

Registered: Dec 2001
Posts: 8408
Quote:
Yes, you'd have to be running code stored in read-sensitive IO registers, at the precise cycle an IRQ is expected. I find it hard to imagine any kind of scenario where that would save you any cycles or memory.

it could be a fun riddle for obfuscation though :)
Previous - 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 - Next
RefreshSubscribe to this thread:

You need to be logged in to post in the forum.

Search the forum:
Search   for   in  
All times are CET.
Search CSDb
Advanced
Users Online
JonEgg
hedning/G★P
Compyx/Focus
Trap/Bonzai
WVL/Xenon
Guests online: 57
Top Demos
1 Uncensored  (9.7)
2 Edge of Disgrace  (9.7)
3 Coma Light 13  (9.6)
4 The Shores of Reflec..  (9.6)
5 Comaland 100%  (9.6)
6 Lunatico  (9.6)
7 Incoherent Nightmare  (9.5)
8 Wonderland XII  (9.5)
9 Comaland  (9.5)
10 Wonderland XIII  (9.5)
Top onefile Demos
1 Pandemoniac Part 2 o..  (9.5)
2 Dawnfall V1.1  (9.5)
3 Synthesis  (9.5)
4 Daah, Those Acid Pil..  (9.5)
5 Treu Love [reu]  (9.5)
6 FMX Music Demo  (9.4)
7 Dawnfall  (9.4)
8 Merry Xmas 2017  (9.4)
9 Hardware Accelerated..  (9.3)
10 Tribute to Bob Wakelin  (9.3)
Top Groups
1 Oxyron  (9.4)
2 Booze Design  (9.4)
3 Censor Design  (9.3)
4 Crest  (9.3)
5 Finnish Gold  (9.3)
Top Mega Swappers
1 Aslive  (9.4)
2 R.C.S.  (9.3)
3 Dishy  (9.2)
4 Calypso  (9.2)
5 Nightshade  (9.1)

Home - Disclaimer
Copyright © No Name 2001-2018
Page generated in: 1.369 sec.