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Forums > C64 Coding > FPP - flexible pixel position
2003-02-04 16:39
Dr. Jay
Account closed

Registered: Jan 2003
Posts: 32
FPP - flexible pixel position

Anyone have a commented source example?
 
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2017-10-13 21:36
Oswald

Registered: Apr 2002
Posts: 4136
thats the problem with high level assemblers, ppl try to write their code with the scripting, instead of coding :P
2017-10-13 21:52
ZeSmasher

Registered: Feb 2003
Posts: 251
thanks for the links, hollowman. I wish my fav painting tool pixcen had those features like convert studio!
2017-10-13 23:58
Compyx

Registered: Jan 2005
Posts: 277
Quoting Oswald
thats the problem with high level assemblers, ppl try to write their code with the scripting, instead of coding :P


High level assemblers make it possible to generate speedcode without the actual generator code, which makes quick testing/optimizing possible. Of course once the speedcode generation using the assembler's "scripting" works, it's time to write actual code generators in proper asm code.
2017-10-14 18:31
Oswald

Registered: Apr 2002
Posts: 4136
Quote: Quoting Oswald
thats the problem with high level assemblers, ppl try to write their code with the scripting, instead of coding :P


High level assemblers make it possible to generate speedcode without the actual generator code, which makes quick testing/optimizing possible. Of course once the speedcode generation using the assembler's "scripting" works, it's time to write actual code generators in proper asm code.


well, I am a native speedcode generator racist. altho I have 20 years of excersize so maybe its just me finding it just as easy as scripting :P and in the long run scriping+doing the native one too, its more work.

how about this instead ? about same nr of lines , 5 minutes more thinking :P

ldx #$00

-

ldy #$07

-

lda src,x
sta dst,x

txa
clc
adc #$08
tax
bne -

inc src+2 ;should be selfmod high byte both
inc dst+2

dey
bpl -

lda #>srcinit
sta src+2
lda #>dstinit
sta dst+2

inc src+1
lda src+1
cmp #$08
bne --
2017-10-14 21:31
lft

Registered: Jul 2007
Posts: 316
Oswald, I don't think that code is doing what you think it is doing. It is certainly not generating the speedcode from xIII's post.
2017-10-14 22:09
Groepaz

Registered: Dec 2001
Posts: 8310
hey, atleast he didnt need a for-loop to generate the wrong code :)
2017-10-14 23:21
Oswald

Registered: Apr 2002
Posts: 4136
its meant to generate the fpp gfx. more readable version (I was lazy with the labels):


lda #<origcharset
sta srcs+1
lda #>origcharset
sta srcs+2

lda #<vicbank
sta dsts+1
lda #>vicbank
sta dsts+2


ldx #$00

-

ldy #$07

-
srcs lda src,x
dsts sta dst,x

txa
clc
adc #$08
tax
bne -

inc srcs+2 ;should be selfmod high byte both
inc dsts+2

dey
bpl -

lda #>origcharset
sta srcs+2
lda #>vicbank
sta dsts+2

inc srcs+1
lda srcs+1
cmp #$08
bne --

those 40 screen bytes should be simply left unused in the cset. feel free to debug.
2017-10-15 18:34
Cruzer

Registered: Dec 2001
Posts: 920
I doubt that what xIII really needs is 12 K of speedcode for a setup routine. :)

@Oswald: Please consider putting your code in a code block to preserve indentation.
2017-10-15 18:39
Cruzer

Registered: Dec 2001
Posts: 920
Quoting Compyx
High level assemblers make it possible to generate speedcode without the actual generator code, which makes quick testing/optimizing possible. Of course once the speedcode generation using the assembler's "scripting" works, it's time to write actual code generators in proper asm code.
Which is where my laziness kicks in and it suddenly becomes much more interesting to try out a new idea. I agree that this is a dangerous feature.
2017-10-15 18:46
Groepaz

Registered: Dec 2001
Posts: 8310
this kind of stuff could already be done in good old TASS MAC ,and probably even older assemblers, btw :)
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