[CSDb] - User Forums - Reversibly mute serial devices by a tight loop drive code which disable interrupts and set ATNA according to ATN IN in a loop

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Forums > CSDb Discussions > Reversibly mute serial devices by a tight loop drive code which disable interrupts and set ATNA according to ATN IN in a loop

2017-11-18 11:36

Monte Carlos

Registered: Jun 2004
Posts: 351

Reversibly mute serial devices by a tight loop drive code which disable interrupts and set ATNA according to ATN IN in a loop

I raised a discussion about this topic by asking a question about C128D(metal) and 1541U usage
http://csdb.dk/forums/?roomid=7&topicid=126539&firstpostd=12673...
Krill came up with the idea of setting up the tight loop and provided me with a short program. It turned out to successfully mute the internal 1571 in contrast to my own more innocent approaches.
There has already been some discussion between Krill and Lft how to reverse the effect of the tight loop after loading has finished.
What do other loader enthusiasts think about this?
Other ideas of how to terminate the tight loop?
I'm really unexperienced with IEC bus, but i like the idea (which would not only help C128D users) and therefore i would like to encourage some more discussion about this topic.

2017-11-18 23:03

Krill

Registered: Apr 2002
Posts: 2839

This seems to be really important to you, opening another thread and asking everybody and their dog for help and all. ;)

Anyhow, i seem to have found a rather simple solution in the meanwhile, at least for my loader and its protocol. (Works in VICE, realthing tests still pending.)

Unlike KERNAL protocol, the custom loader protocol has ATN asserted most of the time, which is basically always except for every other bitpair when the drive sends data to the computer, and the idea is this:

On a falling ATN edge, start a timer, and on a rising ATN edge, disable that timer.
Once the timer expires after a falling ATN edge (64K cycles later), we can be pretty certain that the computer side is not following the loader's protocol any more (the active drive's watchdog IRQ has triggered as well), and so the timer interrupt goes off and resets the drive.

Thanks to lft! I guess that insight about the existing watchdog timer invariants was what nudged me in the right direction.

This is the relevant code snippet from the current source code (ca65):

atnlo:      .byte "m-w", .lobyte($0400), .hibyte($0400), atnhi - * - 1; read forward
            cli
            jmp ($1800)
            .byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
            stx $1800
            sta $1c05; timer 1 hi 
            jmp $0400
atnhi:      .byte "m-w", .lobyte($0480), .hibyte($0480), atnhiend - * - 1; read forward
            sty $1800
            jmp ($1800)
            .byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
            sei
            jmp ($1800)
atnhiend:

This solution will go into my next loader release, but it does not magically work for any 2bit+ATN protocol, of course, so your C128D with built-in 1571 must still rely on a manual reset after running a demo.

2017-11-19 11:59

Monte Carlos

Registered: Jun 2004
Posts: 351

Of course i have a special interest in this topic with my 128D and the 1541U. However it hasn't been my intention to set-up the whole scene on my private problems, i just thought it would also be interesting for other 128D users or people who commonly uses more than one drive with the commodore. Another reason to open this thread was, that the follow up discussion on my original question was targeting loader concepts in a more common sense and deserved a more dedicated room.
Besides that it seemed to bug you very much because you came up with the very clever idea of that tight loop setting ATNA.
I meanwhile tried other demos with 1541 U on my 128D and they all worked without any loader trouble. This is a great success, it think.
Thank you very much for that. I'm looking forward to return in favor something which i can do with my knowledge... ;-)

2017-11-19 21:07

Krill

Registered: Apr 2002
Posts: 2839

A bit of beta-testing the next release candidate would do. :)

I was just wondering why you seemed so keen on a solution to the wake-up problem. The main problem has been solved with the tight loop setting ATNA in response to ATN, and gracefully leaving this is just a nice-to-have, basically. After all, people use to leave demos with a reset or power cycle.

But the nice-to-have is a have now, so all's good. :)

2017-11-20 08:31

oziphantom

Registered: Oct 2014
Posts: 478

If only you could use the SEQ line to do a burst line toggle to restore the drive.

2017-11-20 09:04

tlr

Registered: Sep 2003
Posts: 1714

Quote: If only you could use the SEQ line to do a burst line toggle to restore the drive.

You mean SRQ, is that even connected on a 1541? Reacting to ATN is what you do normally unless you hog it for other things.

2017-11-20 12:33

oziphantom

Registered: Oct 2014
Posts: 478

yeah SRQ sorry. On the 1541 no, but I thought they were talking about muting a 1571 on a 128.

2017-11-20 13:12

Krill

Registered: Apr 2002
Posts: 2839

Well, it works now, no SRQ required. And for all kinds of setup, C-64 or C-128 with or without internal drives. So, not a pity at all.

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