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Forums > C64 Coding > detecting pal, drean, ntsc or old ntsc
2012-11-26 14:21
Peiselulli

Registered: Oct 2006
Posts: 81
detecting pal, drean, ntsc or old ntsc

Hello,
I want to know if a test like this is reliable for the four different machine types PAL, NTSC, NTSC(old) and DREAN (ACME source code):

OLD_NTSC = 1
NTSC = 0
PAL = 2
DREAN = 3

        !to "detect.prg",cbm
	!cpu 6510

	* = $0801
	!by $0b,$08,$00,$00,$9e,$32,$30,$36,$31,$00,$00,$00
		
detect:	sei
w0:  	lda $d012
w1:  	cmp $d012
	beq w1
	bmi w0
	and #$03
	cmp #$01
	bne w2
	lda #OLD_NTSC
	bne detected ; unconditional
w2:	cmp #$03
	lda #$00
	rol
	beq detected	;ntsc

	;check for drean or pal
	ldx #$00
	lda #$10
l	inx
	cmp $d012
	bne l
	lda #PAL
	cpx #$70
	bcc detected
	;is a drean
	lda #DREAN
detected:
	tay
	lax offset,y
l2:	lda base_text,x
	beq end
	jsr $ffd2
	inx
	bne l2
end:	lda #$0d
	jmp $ffd2

base_text:
old_ntsc_text:	!text "OLD "
ntsc_text:	!text "NTSC",0
pal_text:	!text "PAL",0
drean_text:	!text "DREAN",0

offset:		
	!byte ntsc_text-base_text
	!byte old_ntsc_text-base_text
	!byte pal_text-base_text
	!byte drean_text-base_text


 
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2014-01-19 13:59
Ninja

Registered: Jan 2002
Posts: 411
Burglar: Two reasons given here: http://www.the-dreams.de/articles/pal-ntsc-detector.txt
2014-01-19 21:21
Fungus

Registered: Sep 2002
Posts: 680
This works :P

I made it fix jiffyclock timing so things would run at the same speed on different systems (basic etc). But it detects the different systems too reliably. If it bugs in an emulator then the emulator needs to be fixed.

;-----------------------------------------
;PAL/NTSC detector
;
;Fungus/Nostalgia
;
;2010
;-----------------------------------------

;ntsc/pal-n jiffy clock =
;pal-m jiffyclock = 16420/$4024 $4000 rounded for 60 times/sec
;pal-m jiffyclock = 19656/$4cc8 $4c00 rounded for 50 times/sec
;ntsc-m (old) jiffyclock = 16832/$41c0 $4100 rounded for 60 times/sec
;ntsc-m (old) jiffyclock = 20198/$4ee6 $4e00 rounded for 50 times/sec
;ntsc-m jiffyclock = 17095/$42c7 $4200 rounded for 60 times/sec
;ntsc-m jiffyclock = 20514/$5022 $5000 rounded for 50 times/sec
;pal-n jiffyclock = 16900/$4204 $4200 rounded for 60 times/sec
;pal-n jiffyclock = 20280/$4f38 $4f00 rounded for 50 times/sec
;
;pal-m cycles per line is 63
;ntsc-m old cycles per line is 64
;ntsc-m standard and pal-n cycles per line is 65


* = $1000

sei
lda #$00
sta $d012
lda #$01
sta $d01a
lda #$1b
sta $d011
lda #$1f
sta $dc0d
sta $dd0d
lda #<irq1
sta $0314
lda #>irq1
sta $0315
lda $dc0d
lda $dd0d
inc $d019
cli
loop jmp *

lda result
eor #$ff
sta result
lda result+$01
eor #$ff
sta result+$01
cmp #$41
beq ntscold
cmp #$42
beq ntscnew
cmp #$4c
beq pal
bcs drean
unknown jmp *

ntscold
lda #$80
sta $02a6
lda ntscoldjiffy
sta $dc05
bne done
ntscnew
lda #$00
sta $02a6
ntscnewdone
lda ntscjiffy
sta $dc05
bne done

pal
lda #$01
sta $02a6
paldone
lda paljiffy
sta $dc05
bne done

drean
lda #$81
sta $02a6
dreandone
lda dreanjiffy
sta $dc05
done
lda #$00
sta $dc04

sei ;use this to reset to normal after check
lda #$31
sta $0314
lda #$ea
sta $0315
lda #$81
sta $dc0d
lda $dc0e
and #$80
ora #$11
sta $dc0e
lda $dc0d
cli
rts
irq1
ldx #$10
dex
bpl *-1
lda #<irq2
sta $0314
lda #>irq2
sta $0315
lda #$ff
sta $dc04
sta $dc05
lda #$19
sta $dc0e
inc $d019
jmp $ea81
irq2
lda $dc05
sta result+$01
lda $dc04
sta result
lda #$00
sta $d01a
lda #$2c
sta loop
inc $d019
jmp $ea81

result
.byte $00,$00
paljiffy
.byte $40
ntscjiffy
.byte $42
ntscoldjiffy
.byte $41
dreanjiffy
.byte $42
2014-01-19 21:34
chatGPZ

Registered: Dec 2001
Posts: 11350
Quote:
Groepaz: you mentioned in the release that you encountered this problem on your pal-machine. Was that real hardware or emulator?

emu. however, even the most broken emulator has the right amount of cycles per line and frame. as others said already, your detection is broken :)
Quote:
what's wrong with good old $02a6?

the kernal is broken, thats why people started adding those checks to their releases back in 1990 you know :)
2014-01-21 04:30
TWW

Registered: Jul 2009
Posts: 545
I see a lot preferr to count raterlines. How about counting total amount of cycles between VSYNC?

Here is how I'd do it:


    sei              // Set Interrupt Flag (MPU Ignore IRQ line)
    cld              // No stupid tricks ;-)
    lda #$7f
    sta $dc0d        // No more IRQ Interrupts from CIA #1
    lda #$00
    sta $d01a        // No more IRQ Interrupts from VICII
    lda $dc0d        // Ack any latent CIA #1 Interrupts
    lda #$01
    sta $d019        // Ack any latent VICII Interrupts
    lda #$35
    sta $01          // Switch off the MPUs access to BASIC and KERNAL ROM and access the RAM instead (dec/inc $01 allows access to IO RAM).

    // Ignore NMIs
    lda #<nmivector
    sta $fffa
    lda #>nmivector
    sta $fffb        // Set NMI HW Vector to point to RTI
    jmp *+4
nmivector:
    rti
    lda #$00
    sta $dd0e  // Stop CIA #2 Timer A
    sta $dd04
    sta $dd05  // Set Timer A = 0 (NMI will trigger immediately when Timer A is restarted)
    lda #$81
    sta $dd0d  // Set Timer A as NMI source
    lda #$01
    sta $dd0e  // Start Timer A (triggers NMI and unless the NMI get's acked, any new NMI's will be ignored).

    // From this point on we will not be disturbed and can commence testing.

    lda #$00
    sta $d015  // No Sprites
    lda #$00
    sta $d011  // Turn off screen to avoid badlines


    // Detect the model
    //~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    // 312 rasterlines -> 63 cycles per line PAL        => 312 * 63 = 19656 Cycles / VSYNC  => #>76  %00
    // 262 rasterlines -> 64 cycles per line NTSC V1    => 262 * 64 = 16768 Cycles / VSYNC  => #>65  %01
    // 263 rasterlines -> 65 cycles per line NTSC V2    => 263 * 65 = 17095 Cycles / VSYNC  => #>66  %10
    // 312 rasterlines -> 65 cycles per line PAL DREAN  => 312 * 65 = 20280 Cycles / VSYNC  => #>79  %11

    // Use CIA #1 Timer A to count cycled in a frame
    lda #$ff
    sta $dc06
    sta $dc07  // Latch #$ffff to Timer B

    lda $d011
    bmi *-3
    lda $d012
    bne *-3    // VSYNC

    lda #%00011001
    sta $dc0f  // Start Timer B (One shot mode (Timer stops automatically when underflow))

    lda $d011
    bpl *-3    // Wait untill we cross the 256 rasterline

    lda $d011
    bmi *-3
    lda $d012
    bne *-3    // VSYNC again

    lda #$ff
    sec
    sbc $dc07  // Hibyte number of cycles used
    and #%00000011

    sta $0400

    // Turn back on screen to see result (#$00, #$01, #$02 or #$03)
    lda #$1b
    sta $d011

    jmp *



I got some funny result on the emulator when using inject into ram etc. on the first reading but it stabilizes quickly with a small jitter ofcourse. If you want perfection you could stab and use a raster to sync and subtract the overhead to get the exact cycle number but for this purpose this would be pointless as the hi-byte of the Timer is enough to tell the different models apart.
2014-01-21 11:44
JackAsser

Registered: Jun 2002
Posts: 2014
@TWW: Clean!
2014-01-21 13:36
Norrland

Registered: Aug 2011
Posts: 14
Thanks for all suggestions, and especially to Flavioweb... Of course I missed the sei... :) actually I have it as the first opcode after the test... :P
2014-01-21 19:33
tlr

Registered: Sep 2003
Posts: 1787
Quoting TWW
I see a lot preferr to count raterlines. How about counting total amount of cycles between VSYNC?

Here is how I'd do it:
...


Nicely done. I've used something similar. Though my approach was to measure the number of cycles per line, then the number of lines and "multiply". The result is cycles/frame-1 and cycles/line-1 for direct loading into timers.
2014-01-21 21:47
MagerValp

Registered: Dec 2001
Posts: 1074
TWW's cycle counter is impressive, but seems like overkill for most things :) I prefer a straightforward approach:

init:
	lda #$7f	; Disable kernal IRQ.
	sta $dc0d
	
	lda #$ff	; Start on line 255.
:	cmp $d012
	bne :-
	
@nextline:
	lda $d012	; Wait until the next line.
:	cmp $d012
	beq :-		; A contains the previous line number.
	
	bit $d011	; Are we back on line 0?
	bmi @nextline
	
	ora #$30	; A contains the LSB of the last line number:
	sta $0400	;   $05 = 262 x 64 cycle NTSC
	lda #1		;   $06 = 263 x 65 cycle NTSC
	sta $d800	;   $37 = 312 x 63 cycle PAL or 312 x 65 cycle DREAN
2014-01-22 04:42
Peiselulli

Registered: Oct 2006
Posts: 81
@MagerValp : But the main reason for starting this thread is missing : detection between "drean" an "pal".
2014-01-22 04:48
TWW

Registered: Jul 2009
Posts: 545
Slightly improved version:

    // Use CIA #1 Timer B to count cycled in a frame
    lda #$ff
    sta $dc06
    sta $dc07  // Latch #$ffff to Timer B

    bit $d011
    bpl *-3    // Wait untill Raster > 256
    bit $d011
    bmi *-3    // Wait untill Raster = 0

    ldx #%00011001
    stx $dc0f  // Start Timer B (One shot mode (Timer stops automatically when underflow))

    bit $d011
    bpl *-3    // Wait untill Raster > 256
    bit $d011
    bmi *-3    // Wait untill Raster = 0

    sec
    sbc $dc07  // Hibyte number of total cycles
    and #%00000011
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