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Forums > C64 Coding > TIL: The instruction after SEI can be executed before a pending IRQ is handled
2017-11-07 15:56
Krill

Registered: Apr 2002
Posts: 2804
TIL: The instruction after SEI can be executed before a pending IRQ is handled

As described here: http://visual6502.org/wiki/index.php?title=6502_Timing_of_Inter..

I never knew this, after all those years, and thought i'd share this as a heads-up.

Thanks to Bubis for pointing it out to me!
 
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2017-11-08 07:45
ChristopherJam

Registered: Aug 2004
Posts: 1359
Wait, so if I understand that correctly if I have
  SEI
  {instruction1}
  {instruction2}

it's possible to get an interrupt *between* instructions one and two?

That could be Bad :(

Thanks for the heads up.
2017-11-08 08:01
JackAsser

Registered: Jun 2002
Posts: 1987
So, always nop after sei? :)
2017-11-08 08:24
ChristopherJam

Registered: Aug 2004
Posts: 1359
Eh, anything that doesn't access any memory outside the instruction stream should be fine.

Though if you're being really evil one might have to also remember to avoid using your interrupt handler to modify the instruction immediately following the SEI...
2017-11-08 11:22
chatGPZ

Registered: Dec 2001
Posts: 11088
yet another reason to forget this cargo cult of putting sei/cli around raster irq setup :)
2017-11-08 12:54
MagerValp

Registered: Dec 2001
Posts: 1055
I think you're reading the trace wrong. The next instruction following an SEI can be fetched, but not executed if an IRQ occurs during the SEI. The instruction will be re-fetched and executed following the RTI.

And yes, protecting IRQ setup with SEI/CLI is still wrong, but not for this reason :)
2017-11-08 13:26
Dano

Registered: Jul 2004
Posts: 226
Quote: I think you're reading the trace wrong. The next instruction following an SEI can be fetched, but not executed if an IRQ occurs during the SEI. The instruction will be re-fetched and executed following the RTI.

And yes, protecting IRQ setup with SEI/CLI is still wrong, but not for this reason :)


Sorry for being offtopic there, but why is putting the IRQ setup into SEI/CLI wrong? Doesn't this ensure that no IRQ is happening while setting up the shizzle? I am happy to be enlighted on how to do this correctly.
2017-11-08 14:50
TWW

Registered: Jul 2009
Posts: 541
Quote: Sorry for being offtopic there, but why is putting the IRQ setup into SEI/CLI wrong? Doesn't this ensure that no IRQ is happening while setting up the shizzle? I am happy to be enlighted on how to do this correctly.

What he said
2017-11-08 15:01
ChristopherJam

Registered: Aug 2004
Posts: 1359
Quoting MagerValp
I think you're reading the trace wrong. The next instruction following an SEI can be fetched, but not executed if an IRQ occurs during the SEI. The instruction will be re-fetched and executed following the RTI.


Ok, that makes a lot more sense.
2017-11-08 15:07
MagerValp

Registered: Dec 2001
Posts: 1055
SEI doesn't prevent IRQs from happening, it just stops the CPU from handling them. Odds are good that you have a pending IRQ when you CLI, which means you have to have extra setup code to clear that. So for your generic $080d setup code, simply do
lda #$7f
sta $dc0d
before setting up a raster IRQ instead of using SEI.
2017-11-08 15:14
lft

Registered: Jul 2007
Posts: 369
Quoting MagerValp
I think you're reading the trace wrong. The next instruction following an SEI can be fetched, but not executed if an IRQ occurs during the SEI. The instruction will be re-fetched and executed following the RTI.


That makes more sense indeed. The status register will still be pushed with I set, but the interrupt handler is called between the SEI and the following instruction. Phew!
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