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Forums > C64 Coding > VIA 6522 latching still unemulated.
2021-04-08 13:12
Zibri
Account closed

Registered: May 2020
Posts: 304
VIA 6522 latching still unemulated.

let's imagine that on disk are recorded 5 bytes:
we call them x1 x2 x3 x4 and x5

now imagine we positioned in front of them, we skip 3 and read the fourth.
if to do that you use this code:

    CLV
    LDA $1C01   ; A here contains X1
    LDY #$03
loop:
    BVC loop
    CLV
    DEY
    BNE loop
    LDA $1C01 ;  A = X1 on RH and X5 on emulators


on vice, pi1541 and ultimate64/u2+
A will contain "x5".
But on real hardware it will contain X1.

The following code instead will work on both:
        CLV
        LDA $1C01   ; A here contains X1
        LDY #$03
loop:
        BVC loop
        CLV
        DEY
        BNE loop
        LDA $1C0F ; A = X5


That happens because 1C01 keeps the last byte READ (with any LOAD operation or any other cpu instruction that does a READ) while 1C0F contains the actual shift register.

Note:
also putting a "useless" LDA $1C01 inside the loop and the reading 1C01 will work too. But still I think that's an important feature present on BOTH VIA CHIPS that should be emulated.
 
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2021-04-09 12:41
chatGPZ

Registered: Dec 2001
Posts: 11088
That kind of stuff even varies between real drives, eg the "long board" will allow reading more zeros in a row reliably. Its also highly sensitive to rotation speed, and various other subtle factors. As long as existing weak bit protections pass, i doubt anyone will loose his sleep over it (ie what krill wrote above).
2021-04-09 14:23
Martin Piper

Registered: Nov 2007
Posts: 629
$1C0F should be the same as $1C01 except that $1C0F doesn't produce a handshake. Page 3 of http://archive.6502.org/datasheets/rockwell_r6522_via.pdf


The interesting thing is that in the standard 1541 code, $1c0f doesn't seem to be referenced at all.
2021-04-09 15:30
chatGPZ

Registered: Dec 2001
Posts: 11088
Those VIA Datasheet arent actually very useful to understand the detail behaviour of the VIAs (and they contain various mistakes too).
2021-04-09 15:43
Krill

Registered: Apr 2002
Posts: 2804
Quoting Martin Piper
$1C0F should be the same as $1C01 except that $1C0F doesn't produce a handshake.
I seem to remember that reading $1c0f doesn't clear the latch, while reading $1c01 does. On real hardware, that is. =)
2021-04-09 15:51
chatGPZ

Registered: Dec 2001
Posts: 11088
IIRC that part is mentioned in a single sentence in the MOS datasheet though :)
2021-04-10 11:58
Martin Piper

Registered: Nov 2007
Posts: 629
Zibri, just a thing to note:
The two code snippets have different cycle timings:

Quote:

CLV
LDA $1C01 ; A here contains X1
LDY #$03
loop:
BVC loop
CLV
DEY
BNE loop
LDA $1C01 ; A = X1 on RH and X5 on emulators


And:
Quote:

The only code that works on RH is this:
CLV
LDA $1C01 ; A here contains X1
LDY #$03
loop:
BVC loop
CLV
LDA $1C01
DEY
BNE loop
LDA $1C01 ; A = X5


Which would be altering things a bit.
2021-04-10 16:25
Zibri
Account closed

Registered: May 2020
Posts: 304
Quote: IIRC that part is mentioned in a single sentence in the MOS datasheet though :)

Exactly.
And Ignored by emulators apparently.
2021-04-10 16:31
Zibri
Account closed

Registered: May 2020
Posts: 304
Quoting Groepaz
That kind of stuff even varies between real drives, eg the "long board" will allow reading more zeros in a row reliably. Its also highly sensitive to rotation speed, and various other subtle factors. As long as existing weak bit protections pass, i doubt anyone will loose his sleep over it (ie what krill wrote above).

Weak bits don't really exist. All protections I have seen so far that supposedly use "weak bits" in reality they just wrote a bunch of "0" bits in strategic places.
That includes Rubicon and it was confirmed by the author of the protection.
The bits were considered to be weak because they change state between two reads but that does not happen because of some strange invented thing. It happens because of jitter and wobble that cause more or less zeroes to be read, flipped or skipped losing framing. That gives the illusion of "changing bits".
2021-04-10 16:42
chatGPZ

Registered: Dec 2001
Posts: 11088
"It happens because of jitter and wobble that cause more or less zeroes to be read, flipped or skipped losing framing."
thats exactly what weak bits are - was there any doubt about it?
(actually there are also "real" weak bits - written with reduced write current - however that is extremely rare)
2021-04-11 08:32
Martin Piper

Registered: Nov 2007
Posts: 629
Well some floppy manufacturers that did protection products did degauss their floppies first and then use highly calibrated and time controlled disk writers (using a sync hole) that could create areas that effectively lacked magnetic information. They would be read as noise and have data read timing characteristics that were very hard to reproduce in drives without the sync hole and calibration.
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