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Forums > C64 Coding > VIA 6522 latching still unemulated.
2021-04-08 13:12

Registered: May 2020
Posts: 148
VIA 6522 latching still unemulated.

let's imagine that on disk are recorded 5 bytes:
we call them x1 x2 x3 x4 and x5

now imagine we positioned in front of them, we skip 3 and read the fourth.
if to do that you use this code:

    LDA $1C01   ; A here contains X1
    LDY #$03
    BVC loop
    BNE loop
    LDA $1C01 ;  A = X1 on RH and X5 on emulators

on vice, pi1541 and ultimate64/u2+
A will contain "x5".
But on real hardware it will contain X1.

The following code instead will work on both:
        LDA $1C01   ; A here contains X1
        LDY #$03
        BVC loop
        BNE loop
        LDA $1C0F ; A = X5

That happens because 1C01 keeps the last byte READ (with any LOAD operation or any other cpu instruction that does a READ) while 1C0F contains the actual shift register.

also putting a "useless" LDA $1C01 inside the loop and the reading 1C01 will work too. But still I think that's an important feature present on BOTH VIA CHIPS that should be emulated.
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2021-04-08 20:30

Registered: May 2020
Posts: 148
Quoting Groepaz
this is very easy to fix

should be easy to provide a patch then

Yes, why don't you, then?
2021-04-08 20:51

Registered: Dec 2001
Posts: 9792
You are the one who said "this is very easy to fix" - so that question goes right back to you.
2021-04-08 20:52

Registered: Mar 2003
Posts: 1499
You guys
2021-04-08 21:53

Registered: Apr 2002
Posts: 1839
As Groepaz implies, there is a reason why two of the most popular emulators don't do this right. (Does Z64K, btw.? :D)

While it seems easy to implement that latch from a high-level description, there may be various subtle timings and corner cases to observe. Stuff that could potentially break many things, and thus requires extensive testing and even then might suffer regressions temporarily.

So again, i can see why things that work in a given emulator but don't work on original hardware are not exactly at the top of to-do lists, contrary to the other way around.
2021-04-08 22:18

Registered: Dec 2001
Posts: 9792
Indeed. The first step would be to create an extensive set of testcases (an not just a bunch of code snippets, but programs that actually work in the testbench).
2021-04-09 02:27

Registered: May 2020
Posts: 148
I also found a discrepancy in how a varying series of zeroes is handled by real hardware and emulators...
Writing on a disk for example: FF FF FF 88 84 82 80 00 FF FF FF and then reading it back gives very identifiable results.
The best results I have seen come from U2+/Ultimate64 (which only misses wobbling emulation and speed setting to be perfect)
Vice and pi1541 give very identifiable results.
Moreover if you write that series of bits at "density" 3 (32 cycles per byte) and read it back at density 1 (28 cycles per byte) the result is even more different form a real hardware in good condition.
2021-04-09 12:41

Registered: Dec 2001
Posts: 9792
That kind of stuff even varies between real drives, eg the "long board" will allow reading more zeros in a row reliably. Its also highly sensitive to rotation speed, and various other subtle factors. As long as existing weak bit protections pass, i doubt anyone will loose his sleep over it (ie what krill wrote above).
2021-04-09 14:23
Martin Piper

Registered: Nov 2007
Posts: 422
$1C0F should be the same as $1C01 except that $1C0F doesn't produce a handshake. Page 3 of http://archive.6502.org/datasheets/rockwell_r6522_via.pdf

The interesting thing is that in the standard 1541 code, $1c0f doesn't seem to be referenced at all.
2021-04-09 15:30

Registered: Dec 2001
Posts: 9792
Those VIA Datasheet arent actually very useful to understand the detail behaviour of the VIAs (and they contain various mistakes too).
2021-04-09 15:43

Registered: Apr 2002
Posts: 1839
Quoting Martin Piper
$1C0F should be the same as $1C01 except that $1C0F doesn't produce a handshake.
I seem to remember that reading $1c0f doesn't clear the latch, while reading $1c01 does. On real hardware, that is. =)
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