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Krill
Registered: Apr 2002 Posts: 2804 |
Alt-history no-cost design changes with great value
Which things in the C-64 could have been implemented or connected differently without conceivable extra cost, for coding advantages?
Thinking of things like shuffling the chip register bits like VIC's $d011 and $d016 differently (such that some effects can be achieved with fewer register writes or less twiddling).
Or putting some IO register to $01 (and move the memory configuration somewhere else, somehow).
Maybe also having different PLA memory configurations (not necessarily more).
Or connecting external signals to the CIA port pins in a different order.
Discuss! =) |
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Krill
Registered: Apr 2002 Posts: 2804 |
Quoting MixerC-64
- SID noise reduction.
- DMA for memory transfers/register updates. Pretty sure a DMA controller would have added a few dollars to the BOM. =)
What is required for SID noise reduction?
Quoting Mac BaconSprite pos registers would be easier to index if they were in x0,x1,x2,x3,x4,x5,x6,x7,y0,y1,y2,y3,y4,y5,y6,y7 order. Can you elaborate with some examples? |
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Zaz
Registered: Mar 2004 Posts: 33 |
Nah, the C64 is perfect! |
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Martin Piper
Registered: Nov 2007 Posts: 629 |
Colour RAM address like screen RAM |
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MagerValp
Registered: Dec 2001 Posts: 1055 |
Ditching 1540 compatibility, which failed anyway. |
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Oswald
Registered: Apr 2002 Posts: 5007 |
this comes from Graham (he told me on irc aeons ago): why have the top 2 bits of char pointers ANDed to 00 in ECM mode ? just leave them as is.
also probably wouldnt cost much to have a PLA setting where VICII is not forced to see char rom at $1000 and $9000.
I'm totally with Xmikex on the Halt thing. When I learned how Atari does it I was like WTF is it so complicated on c64 then. VICII could just easily halt cpu on every 2nd 2mhz cycle, and just stop doing that on the borders for 2mhz.
proper CIA's with shift registers working into serial bus ?
also dropping potmeters from SID and lightpen from VICII for something more useful?
how about border disable bit in VICII ? probably wouldnt need more then a handful of transistors :) ... or letting badlines go into top/bottom border area..
edit: multicolor mode #2, where its always multicolor, so 16 colors possible for d800.
edit#2: also how about that unused lowmost bit in d018? wouldnt it be nice sometimes to just inc d018 ? :) |
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TWW
Registered: Jul 2009 Posts: 541 |
Another colour ram bank allowing double buffering |
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tlr
Registered: Sep 2003 Posts: 1701 |
A simpler way to sync the CPU to the VIC-II. Either via some kind of halt facility, or at least having a up-counting timer to measure how far from the time of IRQ assertion we are. |
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chatGPZ
Registered: Dec 2001 Posts: 11088 |
Quote:proper CIA's with shift registers working into serial bus ?
the CIA shift registers work just fine |
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Krill
Registered: Apr 2002 Posts: 2804 |
Quoting TWWAnother colour ram bank allowing double buffering Quoting Martin PiperColour RAM address like screen RAM Again, pretty sure these things like colour extra RAM or extending the entire data bus to 12 bits would have added quite a bit to price of the machine.
Please stay with no-cost changes (or very little cost if you will).
Quoting MagerValpDitching 1540 compatibility, which failed anyway. So the ROM loader would be slightly faster, but still very slow? =)
Quoting Oswaldthis comes from Graham (he told me on irc aeons ago): why have the top 2 bits of char pointers ANDed to 00 in ECM mode ? just leave them as is. Very good!
Quoting Oswaldalso how about that unused lowmost bit in d018? wouldnt it be nice sometimes to just inc d018 ? :) As that bit is always 1, inc works pretty well, no? :)
Quoting Oswaldmulticolor mode #2, where its always multicolor, so 16 colors possible for d800. You mean changing multicolour char mode, which renders hires chars for colours 0-7, so it would always put out multicolour chars? |
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TWW
Registered: Jul 2009 Posts: 541 |
Quoting KrillQuoting TWWAnother colour ram bank allowing double buffering Quoting Martin PiperColour RAM address like screen RAM Again, pretty sure these things like colour extra RAM or extending the entire data bus to 12 bits would have added quite a bit to price of the machine.
Please stay with no-cost changes (or very little cost if you will).
Use bank switching and change between 2 ColRAM banks located @ $d800. 2k ram instead of 1k and PLA to handle the switching. |
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