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Forums > C64 Coding > FPP - flexible pixel position
2003-02-04 15:39
Dr. Jay
Account closed

Registered: Jan 2003
Posts: 32
FPP - flexible pixel position

Anyone have a commented source example?
 
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2011-06-30 10:53
CreaMD

Registered: Dec 2001
Posts: 3034
I learned how it works from some Crest demo in past. Neat idea, although kinda memory hungry.
2011-06-30 12:20
chatGPZ

Registered: Dec 2001
Posts: 11108
one essential "trick" regarding fpp is that you can do

lda #value
sta $d018
sta $dd00

(notice which bits in which register are actually used)
2011-06-30 14:38
ferris
Account closed

Registered: May 2011
Posts: 9
Thanks, nice trick :) Hadn't thought of it, though it makes perfect sense. Good one!
2017-10-09 19:40
xIII

Registered: Nov 2008
Posts: 210
I've been trying to do a FPP routine and I came across this topic which should give an answer to my questions but I still don't fully understand FPP. I also looked at codebase64 and I disassembled some FPP routines but I still need some advice.

lda d018_values,x
sta $d018
nop
nop
inx
lda #$1b
sta $d011


First of all, why 20 cycles between each $d011. I would think: badline is 23 cycles ?

example: I want to use charsets at $4000, $4800, $5000, $5800, $6000, $6800, $7000 and $7800.

1. spreading of the charset: 1st line of the original chars in 1ste byte of $4000, 2nd line in 1st byte of $4800, and so on ... correct?

2. Where and how should I spread the screen data, I don't understand this part :(.
If the values for d018 are 0-2-4-6-8-a-c and e the screendata should be located at $4000 ?
But there's a charset @$4000.

Thanks for clearing this up for me :)
2017-10-09 21:07
Oswald

Registered: Apr 2002
Posts: 5017
not sure why 20 cycles probably its how the VIC takes over the bus from the 6510. it needs 0-3 cycles to do that. CPU will be halted if it wants to write the bus, after VIC signaled it wants the cpu to stop, in your case it looks like VIC needs all that 3 cycles to stop the cpu.

1. correct
2. screen 0 first row will show your gfx first row, screen 1 first row will show your gfx second row, etc. similar to charset. charset should work around those 40 bytes. each screen only uses its first row.

why is all this? because FPP stretches 1 line endlessly. to change how the gfx looks you can change d018. but it always shows first pixel row of chars and first char row of screen. so this is why gfx is arranged like it is.
2017-10-09 21:45
chatGPZ

Registered: Dec 2001
Posts: 11108
you write d011 to trigger a badline *before* the counter to the videodata incremented, which results in the stretching.
2017-10-09 21:48
Cruzer

Registered: Dec 2001
Posts: 1048
Don't use the first 5 chars of each charset. That way you'll get 5 * 8 = 40 bytes for the screen row. Also only use every 2nd screen. This way you'll avoid also having to skip 5 chars in the middle of a charset. And you only need 6 screens if you don't use charpacked gfx.

So set up the first screen (4000-4027) with the values 05-2c, the next screen (4800-4827) with 2d-54, and so on. That way you can choose char row with the left nybble of d018, and charset with the right.
2017-10-09 21:57
Krill

Registered: Apr 2002
Posts: 2839
Allow me to clarify a few things.

Technically, the CPU isn't halted. Rather, it's kindly asked to please stop what it's doing asap and then wait. This is done by pulling its RDY line to ground, which is connected to VIC's BA (supposedly, "bus access") line. The CPU only observes this signal if it's reading from the bus, it ignores it on write access. However, it never writes to the bus for more than 3 consecutive cycles (when pushing PC and flags onto the stack on interrupt).

Now, in the example, a badline DMA is triggered by writing to $d011 such that its 3 LSBs match $d018's 3 LSBs - the badline condition. This is triggered right after the "sta $d011" is executed. It is possible to squeeze more cycles into the badline using RMW instructions (inc, dec, shift and rotate) for the $d011 write, as an RMW instruction ends in 2 write cycles. But it should also be possible to have at least one more than 20 cycles in such an FPP badline without that, by simply using more cycles. (Haven't tested it.)

2. The FPP screen is 40 chars wide. While this eats away 5 of the 256 characters in one of the 8 charsets, only 40 of the remaining 251 are used anyways. That is, the screen may reside at $4000..$4027, but the characters in the charsets at $4000, $4800, etc. are only at $x028..$x167.
Also note that there are many different FPP techniques, some using badlines, some using sprites, others without sprites nor badline usage.
2017-10-09 22:01
chatGPZ

Registered: Dec 2001
Posts: 11108
Quote:
a badline DMA is triggered by writing to $d011 such that its 3 LSBs match $d018's 3 LSBs

ooops :)
2017-10-09 22:02
Krill

Registered: Apr 2002
Posts: 2839
Yes, and you posted before i could edit to fix it. "Thanks".
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