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Forums > CSDb Discussions > Error message: "Found more than one drive on IEC bus" with C128D metal and recent demos
2017-11-08 10:26
Monte Carlos

Registered: Jun 2004
Posts: 258
Error message: "Found more than one drive on IEC bus" with C128D metal and recent demos

Sorry for this lamer question. I use an C128D(metal), currently (although i have used C64 for years until i got room problems with the complete setup).
I have attached a 1541 ultimate and changed the internal 1571 drive to device no 10 by cutting the solder pads. The ultimate has dev no 8. This way i can watch many, mostly old, demos with 1541U. However, the most current demos always complain about more than one drive being enabled. Ok, i thought, plugging off the internal 1571 from the mainbord should fix the problem. I was wrong. The loaders still complain about more than one drive.
Am i wrong with my understanding that plugging off the internal drive also disables the ATN signal?
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2017-11-14 14:14

Registered: Apr 2002
Posts: 952
Okay, cool, but do both variants work nicely, with and without "tightloop" enabled? :)
2017-11-14 14:31
Monte Carlos

Registered: Jun 2004
Posts: 258
I did not test this up to now. Currently tightloop = 0.
2017-11-15 12:13
Monte Carlos

Registered: Jun 2004
Posts: 258
Tightloop = 1 also works fine.
2017-11-15 12:24

Registered: Apr 2002
Posts: 952
Alright, great, thanks! I guess i'll also post this on Codebase64 on a boring Sunday or so, since this is a problem that many people might face.
2017-11-15 15:10
Monte Carlos

Registered: Jun 2004
Posts: 258
In common it would be interesting to silence all but one drive before irq-loading sth and then awake drives again after loading or at the end of the production.
2017-11-15 15:53

Registered: Sep 2003
Posts: 1162
Nice work here! I second the "awake" bit. Not entierly trivial. Some kind of more advanced port knocking I guess. Maybe it's sufficient with a sequence of well timed ATN toggles?
2017-11-15 16:05

Registered: Apr 2002
Posts: 952
Yes, this is the hard part and one of the main reasons i haven't added this to former releases of my loaders.
2017-11-15 16:18

Registered: Jul 2007
Posts: 353
But in principle, it shouldn't be too difficult in your case, because your loader already supports many different drives. You could add compile-time switches that modify the drivecode to a dummy version that doesn't read from disk, but still follows the state machine of the communication protocol. It shouldn't actually pull the clock/data lines of course, only ATNA. Or are there complexities in the protocol that prevent this, e.g. different-length responses depending on disk contents?
2017-11-15 18:11

Registered: Apr 2002
Posts: 952
I see several potential problems, more or less from the top of my head:

- Not interfering with the protocol in response to ATN toggles requires ATNA-setting loops to respond at least as quickly as the active drive, if not quicker due to asynchronous clocks, various bus delays due to different positions in the daisy chain, and different pull strengths.

This seems done, but:

- Add on top of the ATNA response a state machine to follow, which might make the ATNA setting too slow and also may not be possible without ambiguities due to the inactive drives not knowing which of the two active parties just pulled the clock or data line. These are the main problems. (I haven't thoroughly analysed the protocol from the angle of third-party bus snooping yet.)

- The active drive uses a watchdog timer to exit to KERNAL protocol upon protocol breach, such as the user deciding to reset the computer at any time between or during loading. Adding this to the inactive drives might render them too slow to set ATNA, and again the decision may be impossible due to ambiguities.

- Ultimately, the ideal setup would be being able to load from any of all the connected drives (think RAID-0 setups or games), which implies solid bus arbitration and further complicated code.

So for the first step, i'm thinking of somehow shoehorning in an ATN spike detection, as the current protocol never toggles ATN quicker than 18 cycles between edges. But then proper debouncing might or might not be in order to avoid false positives, potentially complicating already this simple solution.
2017-11-15 20:37

Registered: Jul 2007
Posts: 353
Good arguments.

There's no need to debounce a digitally controlled signal; You might be thinking about spike suppression. But if you don't need it on the active drive, you probably don't need it on the passive drives, right?

Perhaps the timer interrupt is the answer to this one. If your protocol requires a keepalive signal anyway, then you might be able to put it on the ATN line. Then you have to make the passive drives reset the timer whenever ATN toggles (which causes a jump in the program flow anyway). But resetting the timer takes four cycles, which makes it tricky to pull off.
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