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Summary
Submitted by willymanilly on 17 March 2018
| Tested on real PAL c128D. Does not display correctly with VICE. Use the new UI version of Z64K available at http://www.z64k.com if you want to test this in an emulator. |
Summary
Submitted by willymanilly on 17 March 2018
2Mhz test
Line 0:Automatically detects PAL/NTSC. NTSC will not adjust correctly for all the higher range of sprite and vertical position settigns. 4 digit hexidecimal number is calcuated cycles per frame using Timer B of CIA1.
Line 2:Display mode for 2 Mhz test - E/B/M changes ECM/BITMAP/Multicolor VICII flag
Line 3:CPU in 2Mhz mode!! Character data is data left on the databus by the CPU. 1/2 delays set/reset of 2Mhz flag
Line 4:Internal VICII data. Use H and O to see data written to the VICII internal bus
Test Bit test
Press Z to enable test bit: D030 xx ==> yy
xx=0/2/3 0=disabled, 2=testbit on 4 cycles, 3=testbit on 3 cycles
yy=value to write to d030 to disable testbit - result of this can be seen at delay 854 (PAL)
W/S - decrease/increase position of testbit enable/disable by 63/65(PAL/NTSC) cycles
A/D - decrease/increase position of testbit enable/disable by 1 cycle
I - Idle data at location $3fff - Can be seen at delay 815 (PAL) for any non zero value
+/- Adjust verical position
1-8 Enable/Disable sprites 1-8
C - Change background color. Useful for seeing effects of color phase shifting
RESTORE - Resets program
Delay: = Delayed CPU cycles.
Raster: = value of raster after reseting of Test bit. |
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