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TWW
Registered: Jul 2009
Posts: 541 |
Timing Challenge
Hello everyone. Figured I'd give you a small challenge before the weekend in terms of making a timing delay routine with the least amount of bytes and without destroying any registers for the following amounts of cycles:
26 cycles delay:
pha // 3
pha // 3
pha // 3
nop // 2
bit $00 // 3
pla // 4
pla // 4
pla // 4 <- 26 cycles | 9 bytes
27 cycles delay:
pha // 3
pha // 3
pha // 3
nop // 2
nop // 2
nop // 2
pla // 4
pla // 4
pla // 4 <- 27 cycles | 9 bytes
31 cycles delay:
pha // 3
lda #%00001000 // 2
lsr // 2 2 2 2
bcc *-1 // 3 3 3 2
bit $00 // 3
pla // 4 <- 31 cycles | 9 bytes
32 cycles delay:
pha // 3
lda #%00001000 // 2
lsr // 2 2 2 2
bcc *-1 // 3 3 3 2
nop // 2
nop // 2
pla // 4 <- 32 cycles | 9 bytes
31 cycles delay:
pha // 3
lda #%00001000 // 2
lsr // 2 2 2 2
bcc *-1 // 3 3 3 2
nop // 2
nop // 2
nop // 2
pla // 4 <- 34 cycles | 10 bytes
I have posted my solutions for reference and hope to see creative (hehe got it?) solutions ;-) Have a nice weekend^^ |
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Bob
Registered: Nov 2002
Posts: 71 |
cool... but what is the point for throwing away cycles ?
I'll rather use them ;) |
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TWW
Registered: Jul 2009
Posts: 541 |
Quoting JackAsserObviosly SP, Flags and stack may be clobbered
Sorry, should have been more specific, Flags can be messed with although the SP should be intact but the stack may be used as long as SP is restored upon exit. |
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ChristopherJam
Registered: Aug 2004
Posts: 1378 |
Standard opcodes only, or are illegals allowed?
Can the routine require a page crossing at a given point within the sequence, or should we assume the sequence is all on the same page? |
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TWW
Registered: Jul 2009
Posts: 541 |
IOPs and page alignment trickery allowed ;-) |
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HCL
Registered: Feb 2003
Posts: 716 |
I would go for Soci:s method, or something with JMP to share the code. Like..:
Wait10
jmp Wait7
Wait9
jmp Wait6
Wait8
jmp Wait5
Wait7
jmp Wait4
Wait6
jmp Wait3
Wait5
jmp Wait2
Wait4
nop
Wait2
nop
rts
Wait3
bit 0
rts
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Trash
Registered: Jan 2002
Posts: 122 |
I wouldnt consider size at all...
wait63 .byte $c9 ; cmp#
wait62 .byte $c9 ; cmp#
...
wait3 .byte $24 ; bit $
wait2 .byte $ea ; nop
rts ; 63 bytes for all delays between 69 and 8 cycles
...unless I had a really specific case |
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soci
Registered: Sep 2003
Posts: 473 |
Exactly, just JSR into the slide and each new delay costs only 3 bytes. For large enough number of different delays it might worth it. |
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lft
Registered: Jul 2007
Posts: 369 |
What if we disallow stack usage? Then the JSR approach doesn't work anymore. Is that an interesting challenge? |
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JackAsser
Registered: Jun 2002
Posts: 1989 |
Quote: What if we disallow stack usage? Then the JSR approach doesn't work anymore. Is that an interesting challenge?
27 cycle delay in 10 bytes, no stack usage:
stx :++ +1
ldx #4
:dex
bne :-
:ldx #0
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Oswald
Registered: Apr 2002
Posts: 5018 |
1 rasterline is about ldx #7-8. memories from 26 years ago :) |
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