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Forums > CSDb Entries > Release id #141145 : Planet 5200

2015-09-14 18:58

Heaven
Account closed

Registered: Jul 2008
Posts: 102

Release id #141145 : Planet 5200

new CIA 4x4

this is basicly the source I have for 4x4:

;-------- init4x4 ----------------------
;blockbegin

.align $0100

init_4x4
sei
; lda #$35 ...already set
; sta $01

lda #$7f
sta $dd0d
lda $dd0d
ldx #<(fake_nmi)
ldy #>(fake_nmi)
stx $fffa
sty $fffb
ldx #<(timer_test)
ldy #>(timer_test)
stx $dd04
sty $dd05
lda #$11
sta $dd0e
lda #$81
sta $dd0d
.byte $ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea
fake_nmi
ldx $dd04
lda #$7f
sta $dd0d
lda $dd0d
plp
pla
pla
cpx #3
beq old_cia
lda #$24 ; bit zp
sta cia_mod
sta cia_mod2
.byte $ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea
.byte $ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea
.byte $ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea,$ea
old_cia
ldx #<(nmi)
ldy #>(nmi)
stx $fffa
sty $fffb
ldx #<(timer_a)
ldy #>(timer_a)
stx $dd04
sty $dd05
ldx #<(timer_b)
ldy #>(timer_b)
stx $dc06
sty $dc07
.page
PalTiming
ldx #3
cpx $d012
bne *-3
ldy #9
dey
bne *-1
cmp ($00),y
inx
cpx $d012
beq PalTiming2
cmp ($00),y
PalTiming2
ldy #9
dey
bne *-1
nop
nop
nop
inx
cpx $d012
beq PalTiming4
b_rts = *+1
cmp $60
PalTiming4
ldy #10
dey
bne *-1
nop
inx
cpx $d012
bne PalTiming6
PalTiming6
.endp
pha
pla
pha
pla
cia_mod cmp #$DB
.if !below_io
bit $DB
.fi
lda #$11
sta $dd0e
ldy #5
dey
bne *-1
cia_mod2 cmp $DB,x
.if below_io
bit $DB
.fi
sta $dc0f
lda #$40
sta b_rti

lda #$7f
sta $d019
sta $dc0d
lda $dc0d
ldx #<(vic_irq_start)
ldy #>(vic_irq_start)
stx $fffe
sty $ffff
lda #ras_start
sta $d012
lda #$1b
sta $d011
lda #1
sta $d01a
lda #$34
sta $01
cli
rts

;lda #%00011000
;lda #%00101000

nmi
sta nmi_accu+1
lda #15
.if below_io
sta $01 ; timing critical^
.fi
eor $dc06
sta timeit+1
.page
timeit bpl timeit+2
.byte $a9,$a9,$a9,$a9,$a9,$a9,$24,$ea
.endp

scrmod1 lda #%10101000
sta $d018
d11b lda #$1f
sta $d011
d11a lda #$1b
sta $d011
scrmod2 lda #%10111000
sta $d018

.if below_io
bit $dd0d
lda #$30 ; not timing critical
sta $01
nmi_accu lda #$FF
rti
.else
nmi_accu lda #$FF
jmp b_rti
.fi

.align $0100
vic_irq_start
sta irq_start_accu+1
.if below_io
lda #$35 ; not timing critical
sta $01
.fi
lda #ras_stop
sta $d012
bit $dd0d

lda #$81
sta $dd0d
sta $d019
lda #<(vic_irq_stop)
sta $fffe
.if below_io
lda #$30 ; not timing critical
sta $01
.fi
irq_start_accu
lda #$FF
rti

vic_irq_stop
sta irq_stop_accu+1
.if below_io
lda #$35 ; not timing critical
sta $01
.fi
.if open_border
lda #$13
sta $d011
.fi
lda #ras_start
sta $d012
lda #1
sta $dd0d
sta $d019
lda #<(vic_irq_start)
sta $fffe

.if below_io
lda #$30 ; not timing critical
sta $01
.fi
irq_stop_accu
lda #$FF
rti

question...

what does the .page command do?

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2015-09-16 01:05

soci

Registered: Sep 2003
Posts: 479

Way too much talking, but no one's debugging.

Now everyone who can't tell based on this dump what the problem is should give back their coder card *now*, and is requested to send in a new application for re-certification.

Does not apply for those who didn't received it yet ;)

.4D04 000 024   58476624  A9 35       LDA #$35   3b0e1cf2
.4D06 000 026   58476626  85 01       STA $01    350e1cf2
.4D08 000 029   58476629  A9 7F       LDA #$7F   350e1cf2
.4D0A 000 031   58476631  8D 0D DD    STA $DD0D  7f0e1cf2
.4D0D 000 035   58476635  AD 0D DD    LDA $DD0D  7f0e1cf2
.4D10 000 039   58476639  A2 38       LDX #$38   000e1cf2
.4D12 000 041   58476641  A0 4D       LDY #$4D   00381cf2
.4D14 000 043   58476643  8E FA FF    STX $FFFA  00384df2
.4D17 000 047   58476647  8C FB FF    STY $FFFB  00384df2
.4D1A 000 051   58476651  A2 10       LDX #$10   00384df2
.4D1C 000 053   58476653  A0 00       LDY #$00   00104df2
SDMA 0
SDMA 1
SDMA 2
SDMA 3
SDMA 4
SDMA 5
SDMA 6
SDMA 7
START 58476654 NUM 19 SUB 0 MAIN 58476655 DMAST 58476654
*** DMA VICII   58476654  19
.4D1E 001 011   58476674  8E 04 DD    STX $DD04  001000f2
.4D21 001 015   58476678  8C 05 DD    STY $DD05  001000f2
.4D24 001 019   58476682  A9 11       LDA #$11   001000f2
.4D26 001 021   58476684  8D 0E DD    STA $DD0E  111000f2
.4D29 001 025   58476688  A9 81       LDA #$81   111000f2
.4D2B 001 027   58476690  8D 0D DD    STA $DD0D  811000f2
.4D2E 001 031   58476694  EA          NOP        811000f2
.4D2F 001 033   58476696  EA          NOP        811000f2
.4D30 001 035   58476698  EA          NOP        811000f2
.4D31 001 037   58476700  EA          NOP        811000f2
.4D32 001 039   58476702  EA          NOP        811000f2
.4D33 001 041   58476704  EA          NOP        811000f2
.4D34 001 043   58476706  EA          NOP        811000f2
*** NMI CIA2 58476708
.4D38 001 052   58476715  AE 04 DD    LDX $DD04  811000ef
SDMA 0
SDMA 1
SDMA 2
SDMA 3
SDMA 4
SDMA 5
SDMA 6
SDMA 7
START 58476717 NUM 19 SUB 0 MAIN 58476718 DMAST 58476717
*** DMA VICII   58476717  19
.4D3B 002 012   58476738  A9 7F       LDA #$7F   810300ef
.4D3D 002 014   58476740  8D 0D DD    STA $DD0D  7f0300ef
.4D40 002 018   58476744  AD 0D DD    LDA $DD0D  7f0300ef
.4D43 002 022   58476748  28          PLP        810300ef
.4D44 002 026   58476752  68          PLA        810300f0
.4D45 002 030   58476756  68          PLA        350300f1
.4D46 002 034   58476760  E0 03       CPX #$03   4d0300f2
.4D48 002 036   58476762  F0 29       BEQ $4D73  4d0300f2
.4D73 002 039   58476765  A2 05       LDX #$05   4d0300f2
.4D75 002 041   58476767  A0 4E       LDY #$4E   4d0500f2
.4D77 002 043   58476769  8E FA FF    STX $FFFA  4d054ef2
.4D7A 002 047   58476773  8C FB FF    STY $FFFB  4d054ef2
.4D7D 002 051   58476777  A2 F7       LDX #$F7   4d054ef2
.4D7F 002 053   58476779  A0 01       LDY #$01   4df74ef2
SDMA 0
SDMA 1
SDMA 2
SDMA 3
SDMA 4
SDMA 5
SDMA 6
SDMA 7
START 58476780 NUM 19 SUB 0 MAIN 58476781 DMAST 58476780
*** DMA VICII   58476780  19
.4D81 003 011   58476800  8E 04 DD    STX $DD04  4df701f2
.4D84 003 015   58476804  8C 05 DD    STY $DD05  4df701f2
.4D87 003 019   58476808  A2 3E       LDX #$3E   4df701f2
.4D89 003 021   58476810  A0 00       LDY #$00   4d3e01f2
.4D8B 003 023   58476812  8E 06 DC    STX $DC06  4d3e00f2
.4D8E 003 027   58476816  8C 07 DC    STY $DC07  4d3e00f2
.4D91 003 031   58476820  A2 03       LDX #$03   4d3e00f2
.4D93 003 033   58476822  EC 12 D0    CPX $D012  4d0300f2
.4D96 003 037   58476826  D0 FB       BNE $4D93  4d0300f2
.4D98 003 039   58476828  A0 09       LDY #$09   4d0300f2
.4D9A 003 041   58476830  88          DEY        4d0309f2
.4D9B 003 043   58476832  D0 FD       BNE $4D9A  4d0308f2
.4D9A 003 046   58476835  88          DEY        4d0308f2
.4D9B 003 048   58476837  D0 FD       BNE $4D9A  4d0307f2
.4D9A 003 051   58476840  88          DEY        4d0307f2
.4D9B 003 053   58476842  D0 FD       BNE $4D9A  4d0306f2

2015-09-16 07:14

Oswald

Registered: Apr 2002
Posts: 5086

never read such dump, so it took a while, sprites turned on prematurely ?

2015-09-16 07:31

Heaven
Account closed

Registered: Jul 2008
Posts: 102

I have co clue :D

Is that VICE monitor? Does it have such advanced features? ;)

2015-09-16 07:32

Oswald

Registered: Apr 2002
Posts: 5086

@heaven, try to turn on sprites AFTER 4x4 initialization. looks like they interfere with timing setup. (and keep them OFF while initing)

if I read that correctly SDMA lines means cycles where the cpu is halted - because VICII is reading sprite gfx - instead of running code as it should be.

2015-09-16 11:01

Heaven
Account closed

Registered: Jul 2008
Posts: 102

ah... now that sounds like a plan.

Thanks Oswald... lesson learned... without Sprite logo before init it works!

2015-09-16 15:05

Flavioweb

Registered: Nov 2011
Posts: 463

Soci: how did you made your dump?

2015-09-16 19:25

chatGPZ

Registered: Dec 2001
Posts: 11354

compile VICE in debug mode and use debug options :)

2015-09-16 20:19

Oswald

Registered: Apr 2002
Posts: 5086

yeah btw, Soci, THANKS! :)

2015-09-17 03:10

soci

Registered: Sep 2003
Posts: 479

Quote: Soci: how did you made your dump?

Flavioweb: What Groepaz said.

It was suspect that there were sprites in use, and had a look just in case... Bingo! ;)

Should have checked it before I did that quick CIA hack which is crashing every now and then.

Heaven: You don't need to remove the logo as it resides in the visible area and the timing measurement is under the border, so in theory they should normally never meet.

But they still do meet, why? (hint: fcevgr L cbfvgvba if. enfgre pbhagre)

If you make sure that sprites are turned off under the border when your timing loop runs then it'll be fine.

Oswald: you may retain your card ;)

I go back to fixing my own bugs, there are plenty...

2015-09-17 11:22

Flavioweb

Registered: Nov 2011
Posts: 463

I enabled debug in the past, but since i totally missed how powerful dump is, i turned it off.
Thanks a lot for this tip!

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