initstabilise lda $d012 ldx #10 ; 2 - dex ; (10 * 5) + 4 bpl - ; 54 nop ; 2 eor $d012 - $ff,x; 5 = 63 bne initstabilise; 7 = 70 [...]; timer setup
I do not know exactly how crunchers tailored to 6502 code work, but what will turn out to be the shortest crunched routine, could depend on the code or data around it, is that correct?
HH0c shx $HH00,Y HH0f lda #any_value HH11 bpl *-5
loop: lda $a6,x shx $00a0,y beq loop
entry: ldx $9e ldy #$00 beq loop
Nice, but it would be quite a coincidence that you would need exactly these presettings in the rest of the intro or demo. Perhaps there are ZP adresses that normally (I mean, after a cold start), have the required values.
shx $HH00,y BYTE any_value bne *-4
I know almost nothing about decrunchers, so I don't have a clue what they can do in terms of "initial conditions" of ZP-adresses or registers, etc.
If they can, for example, give you a desired value of X and Y (without increasing net code size), then perhaps a 6-byte loop is possible with something like this: shx $HH00,y BYTE any_value bne *-4 The code location and $HH should be such that X & {H+1} is the opcode for instructions like TXA, TYA, while X should contain the opcode for a 3-byte instruction. So without DMA, the byte after the SHX instruction is replaced by e.g. TYA ensuring the branch is taken, and with DMA the loop exits with the 3-byte instruction whose opcode was in X. But this is stretching it really far!
SHX $HH00,Y CLC BCC *-4
ldy #init_value ;Init code sync: lax $dc04 sbx #51 sty ZP ;RRW instruction. Part of init code. cpx $dc04 bne sync:
