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chatGPZ
Registered: Dec 2001
Posts: 11135 |
(Ab)use of dummy accesses
For the next release of my "No more Secrets" doc i am preparing a chapter related to the dummy access which happen when the CPU performs an internal operation. Once again i am looking for some examples on how to (ab)use it :) I guess everyone knows "inc $d019" - but i am sure there is more than this. And not only with RMW instructions. So if you have anything in your mind - just drop it here!
here are some related notes which i pasted together. feel free to proofread and point out mistakes :) |
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ChristopherJam
Registered: Aug 2004
Posts: 1380 |
Quoting ChristopherJamI'm fairly sure one of the iterations in developing a stable hard restart used one cycle blips of the gate bit to allow RC to escape at known times, but it didn't turn out to be the most optimal. I'll have a rummage.
"sieve" at SID envelope rate counter phase alignment - which just reminds me I need to fix the hosting of those images and runlogs..
But yes, interesting that the readback is perfectly reliable if you're safely under 2000 cycles. Presumably one could first write to one of the undefined registers between $1d and $1f to much the same effect. |
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chatGPZ
Registered: Dec 2001
Posts: 11135 |
Hey, is that all? *push* :) |
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S.E.S.
Registered: Apr 2010
Posts: 19 |
If you want to have raster splits that are exactly 5 cycles wide, you can use ldx #$ff
ldy #$05
lda #$00
sty $d021
sta $cf22,x I don't know if anybody actually used that in an intro or a demo, though :) |
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Oswald
Registered: Apr 2002
Posts: 5022 |
make em 3 cycles wide :) |
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Hoogo
Registered: Jun 2002
Posts: 102 |
What about the color of the colorram in multicolor FLI? |
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chatGPZ
Registered: Dec 2001
Posts: 11135 |
what about it? |
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Hoogo
Registered: Jun 2002
Posts: 102 |
Is it an example for "side effect of fetching next opcode" for your purpose? |
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chatGPZ
Registered: Dec 2001
Posts: 11135 |
yes and no - this particular case is already described in detail in the pdf ("Blackmail FLI") :) |
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chatGPZ
Registered: Dec 2001
Posts: 11135 |
Quote: Lovely stuff!!!
” Most 1-Byte instructions will fetch PC+1 after the opcode fetch”
All 1-byte right?
btw, its not all of them .... the various JAM opcodes will stall before that happens. not that it matters :) |
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JackAsser
Registered: Jun 2002
Posts: 1989 |
Quote: btw, its not all of them .... the various JAM opcodes will stall before that happens. not that it matters :)
Haha wtf! That doesn’t count!! :D |
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