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Forums > C64 Composing > Sounds bugs out, what do I need to do to fix it
2020-02-08 15:39
oziphantom

Registered: Oct 2014
Posts: 406
Sounds bugs out, what do I need to do to fix it

Here is the sound playing again and again sometimes it works sometimes it doesn't https://www.dropbox.com/s/djfex0yvc7pkx2r/VICE_%20C64%20%28x64s..
when I play the original SID is works more often, but still fails randomly.

24:15 6:17 5:111 4:1 
4:65 3:1 2:1 1:26 0:21 
4:64 1:12 0:79 
4:65 
4:64 1:13 0:10 
4:65 0:209 
1:14 0:163 
hold
4:64 1:15 0:130 
1:162 0:6 
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
hold
6:0 5:0 

the above is what the registers are set to, one line per frame, format is register:value. Hold means it has the same values as last frame. All the values are set into a buffer, which is then written to the SID backwards (18->0) as per Goattracker.

I've added setting the voices registers to 0, for varying number of frames, some wait values seem better than others.

Any ideas?
2020-02-08 16:59
Flavioweb

Registered: Nov 2011
Posts: 402
I've tested some orders to play buffered regs, and found this sequence that works almost always:
    .BYTE $18, $17, $16, $15, $0F, $0E, $11, $10, $14
    .BYTE $13, $12, $08, $07, $0A, $09, $0D, $0C, $0B
    .BYTE $01, $00, $03, $02, $06, $05, $04

These values are intended as offsets from $D4xx.
2020-02-08 17:06
cadaver

Registered: Feb 2002
Posts: 1133
Read up on the ADSR bug

https://codebase64.org/doku.php?id=base:classic_hard-restart_an..

If the channel's internal volume level counter is still at maximum ($ff) and the ADSR release state is stalled due to the bug, the volume counter will wrap to $00 when you switch from gate off back to gate on, and cause the sound start to fail.

Due to the ADSR bug it's risky to do gate on-off transitions at 1 frame frequency.
2020-02-08 17:25
Frantic

Registered: Mar 2003
Posts: 1437
I hate the ADSR bug with a passion.

There is also this:
https://codebase64.org/doku.php?id=base:a_new_kind_of_hard-rest..
2020-02-09 12:33
Laurent

Registered: Apr 2004
Posts: 21
Quoting Frantic
I hate the ADSR bug with a passion
I feel the ADSR delay bug that has one good side-effect. When the delay bug is triggered on a new note's attack, it can introduce a delay of 33ms before the attack actually takes place.
That means nothing happens during one full 20ms frame, and the attack only starts 13ms after the 2nd frame start.
When the instrument starts with a noise waveform, you hear it for only 7ms before other waveforms for the instrument kick in in the following frames.

On instruments like kick drums or bass, starting with a 7ms noise sounds way better than with 20ms.
Well, I recon this is subjective :) but this is something other 8bits machines (or AHX) don't do as they also often update registers at 50Hz and are stuck with at least 20ms waveform length.
2020-02-09 13:32
Frantic

Registered: Mar 2003
Posts: 1437
I grant you a point there, sir.
2020-02-10 10:54
ChristopherJam

Registered: Aug 2004
Posts: 1043
Stop toggling between an attack of 6 and a release of 1.
Every time you clear gate during the note start you're risking the ADSR bug.


Easiest fixes would be to
- keep gate set, or
- set attack, decay and release to the same value in frame zero, and only decrease the release value after you've finished toggling gate


Here's a ten frame dump of register values, envelope state and rate limit after each write.
There's an asterisk at the end of each danger line.
First line for each frame is the register values before writes occur, included so we can see starting state and rate limit for that update.

caveat - this simulation is assuming the ADSR bug is triggered on every danger line - in practice there's an 11% chance (31/266) that the bug won't trigger on each of frames 2 and 4, in which case the run would look a little different.

frame 00:
  f:0000 p:0000  c:00  adsr:0000  state:r  rate limit:     8  
  f:0000 p:0000  c:00  adsr:0011  state:r  rate limit:    31  
  f:0000 p:0000  c:00  adsr:6f11  state:r  rate limit:    31  
  f:0000 p:0000  c:01  adsr:6f11  state:a  rate limit:   266  

ev rises to 73

frame 01:
  f:0000 p:0000  c:01  adsr:6f11  state:a  rate limit:   266  
  f:0000 p:0000  c:41  adsr:6f11  state:a  rate limit:   266  
  f:0000 p:0100  c:41  adsr:6f11  state:a  rate limit:   266  
  f:0000 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:1a00 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:1a15 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  

ev rises to 147

frame 02:
  f:1a15 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:1a15 p:0101  c:40  adsr:6f11  state:r  rate limit:    31 *
  f:0c15 p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:0c4f p:0101  c:40  adsr:6f11  state:r  rate limit:    31  

ev holds at 147

frame 03:
  f:0c4f p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:0c4f p:0101  c:41  adsr:6f11  state:a  rate limit:   266  

ev rises to 171

frame 04:
  f:0c4f p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:0c4f p:0101  c:40  adsr:6f11  state:r  rate limit:    31 *
  f:0d4f p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:0d0a p:0101  c:40  adsr:6f11  state:r  rate limit:    31  

ev holds at 171

frame 05:
  f:0d0a p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:0d0a p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:0dd1 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  

ev rises to 195

frame 06:
  f:0dd1 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:0ed1 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  
  f:0ea3 p:0101  c:41  adsr:6f11  state:a  rate limit:   266  

ev rises to 255

entering decay, new limit = 31250

ev holds at 255

frame 07:
  f:0ea3 p:0101  c:41  adsr:6f11  state:d  rate limit: 31250  

ev holds at 255

frame 08:
  f:0ea3 p:0101  c:41  adsr:6f11  state:d  rate limit: 31250  
  f:0ea3 p:0101  c:40  adsr:6f11  state:r  rate limit:    31 *
  f:0fa3 p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:0f82 p:0101  c:40  adsr:6f11  state:r  rate limit:    31  

ev holds at 255

frame 09:
  f:0f82 p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:a282 p:0101  c:40  adsr:6f11  state:r  rate limit:    31  
  f:a206 p:0101  c:40  adsr:6f11  state:r  rate limit:    31  

ev starts falling most of the way into this frame. 


(also worth noting, the above dump was from a quick script I wrote this afternoon that was originally just going to be a pretty printer of the register values, before I realised I'd have to include a basic envelope simulation to determine which of attack or release SID is in - there might still be bugs in the simulation, but the register values at least should be fine)
2020-02-10 13:13
Jammer

Registered: Nov 2002
Posts: 909
Geir Tjelta has probably the best insight into ADSR workout. Sadly, he's not quite into discussions here :(
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