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Flavioweb
Registered: Nov 2011
Posts: 447 |
[C128] Irq question ...
How can i make this code run on a C128 exactily at same addressess?
(I hope this isn't too much off-topic here...)
.C:3000 78 SEI
.C:3001 A9 7F LDA #$7F
.C:3003 8D 0D DC STA $DC0D
.C:3006 A9 00 LDA #$00
.C:3008 8D 14 03 STA $0314
.C:300b A9 40 LDA #$40
.C:300d 8D 15 03 STA $0315
.C:3010 A9 FF LDA #$FF
.C:3012 8D 12 D0 STA $D012
.C:3015 A9 01 LDA #$01
.C:3017 8D 1A D0 STA $D01A
.C:301a 4E 19 D0 LSR $D019
.C:301d 58 CLI
.C:301e 4C 1E 30 JMP $301E
.C:4000 EE 20 D0 INC $D020
.C:4003 EE 21 D0 INC $D021
.C:4006 AD 12 D0 LDA $D012
.C:4009 CD 12 D0 CMP $D012
.C:400c F0 FB BEQ $4009
.C:400e CE 20 D0 DEC $D020
.C:4011 CE 21 D0 DEC $D021
.C:4014 4E 19 D0 LSR $D019
.C:4017 4C 33 FF JMP $FF33 |
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oziphantom
Registered: Oct 2014
Posts: 480 |
yeah its a flaw in the KERNAL sadly.. it should have been something like
ff1c AD 00 FF LDA $FF00 - A:00 X:17 Y:00 SP:14 - IZ
ff1f 48 PHA - A:00 X:17 Y:00 SP:14 - IZ
ff20 8D 00 FF STA $FF04 - A:00 X:17 Y:00 SP:13 - IZ
but then it has issues as well. Another flaw of this is it assumes the Stack is at $100 which isn't always true either.. and can lead to fun "why did the monitor just start" scratching head sessions - the lack of chis on x128 can really hurt sometimes.
I remember Bil Herd saying that post release he ask Fred why he didn't use the MMU, and his response was "Because there are no Kernal only registers", to which Bil responded "Why didn't you tell me.."
The handy thing with the Pre Configs is they don't trash a register, so you could put your IRQ at $3FFD
0:3FFD sta FF02 <- disable BASIC LO, HI,EDITOR,MONITOR
0:4000 pha
0:4001 tax
.....
You need to set up the PreConfigs to be what you want first, but it only adds 4 clocks |
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Flavioweb
Registered: Nov 2011
Posts: 447 |
WTF they choosed to force ROMS ON anyway!?!
If i disable the roms and computer crashes ... are just my businness!
If i want to setup a IRQ under ROMS the only way is to disable kernal... or put a "trampoline" in a ram area...
If i need kernal in other parts of my code, outside the irq, the only solution is to have a trampoline somewhere...
/o\ |
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Oswald
Registered: Apr 2002
Posts: 5029 |
well trampoline it, you only waste some bytes in ram, you can even enter the rom irq faster by bypassing some of it. |
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oziphantom
Registered: Oct 2014
Posts: 480 |
If you know its not going to be used, you can set up the JMPFAR routine $02/$03/$04 bank lo hi and just point the IRQ vector to x:02e3 |
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Krill
Registered: Apr 2002
Posts: 2855 |
Just have a two-fold approach.
- KERNAL disabled would go to your actual interrupt handler directly via $fffe/f.
- KERNAL enabled would go to the ROM interrupt handler, then to the trampoline via $0314/5, which would then go to the actual interrupt handler.
This way, you're only using the cycles you really need to use while allowing both KERNAL on and off. |
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oziphantom
Registered: Oct 2014
Posts: 480 |
But yes, welcome to the 128, it has ROM EVERYWHERE, however you can switch out the CHARGEN EVERYWHERE as well which is nice. |
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JackAsser
Registered: Jun 2002
Posts: 1994 |
Quote: Just have a two-fold approach.
- KERNAL disabled would go to your actual interrupt handler directly via $fffe/f.
- KERNAL enabled would go to the ROM interrupt handler, then to the trampoline via $0314/5, which would then go to the actual interrupt handler.
This way, you're only using the cycles you really need to use while allowing both KERNAL on and off.
This is exactly what I do in EotB and my oen handler mimics the kernel so that timing is the same (not c128 related) |
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