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chatGPZ
Registered: Dec 2001
Posts: 11386 |
(Ab)use of dummy accesses
For the next release of my "No more Secrets" doc i am preparing a chapter related to the dummy access which happen when the CPU performs an internal operation. Once again i am looking for some examples on how to (ab)use it :) I guess everyone knows "inc $d019" - but i am sure there is more than this. And not only with RMW instructions. So if you have anything in your mind - just drop it here!
here are some related notes which i pasted together. feel free to proofread and point out mistakes :) |
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tlr
Registered: Sep 2003
Posts: 1790 |
Quote: it would be great if you'd post an actual working example, that would safe a lot of time =)
Copyfault implemented that here: Sideborder Sprite Data Fetch TestProg, presumably based on my suggestion in post #12 of this thread: Sprite data fetch in sideborder |
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Copyfault
Registered: Dec 2001
Posts: 478 |
Sorry for not posting the links.
Thanks a bunch, tlr! And ofcourse, the basic idea for getting the pattern bytes at the right positions of the sprite data pipe was yours!!! |
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Fred
Registered: Feb 2003
Posts: 285 |
Quote: Quote:The music routine from Fred Gray performs a read and write on IO
thats not abusing the dummy accesses though.... it relies on the floating bus value (what a terrible idea =P)
The dummy write in the INC instruction is still executed but perhaps in this example has no audible impact on the output of the SID. The dummy access writes the same value to the SID again. I can imagine that when the gate bit was already set and with the INC instruction set again in the first write, that it will have impact on the ADSR state.
Also it will write 2 times to the SID with 1 cycle difference which is not possible with any other instruction. This cycle difference may be abused with any IO register.
Some example of my CIA test routine which makes use of the dummy access:
https://sourceforge.net/p/vice-emu/bugs/740/ |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
Ah yes, it would indeed introduce a small difference in timing. ok :) |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
come on coronapeoples, this cant be all! :) |
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tlr
Registered: Sep 2003
Posts: 1790 |
You could always use RMW instructions to make double grey dots. |
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ChristopherJam
Registered: Aug 2004
Posts: 1409 |
Quoting GroepazQuote:The music routine from Fred Gray performs a read and write on IO
thats not abusing the dummy accesses though.... it relies on the floating bus value (what a terrible idea =P)
I though reads from SID were explicitly zero, rather than floating bus value?
I'm fairly sure one of the iterations in developing a stable hard restart used one cycle blips of the gate bit to allow RC to escape at known times, but it didn't turn out to be the most optimal. I'll have a rummage. |
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Fred
Registered: Feb 2003
Posts: 285 |
Quoting ChristopherJam
Quoting GroepazQuote:The music routine from Fred Gray performs a read and write on IO
I though reads from SID were explicitly zero, rather than floating bus value?
From the documentation of resid-fp:
Reading a write only register returns the last char written to any SID register. The individual bits in this value start to fade down towards zero after a few cycles. All bits reach zero within approximately $2000 - $4000 cycles. It has been claimed that this fading happens in an orderly fashion, however sampling of write only registers reveals that this is not the case. NB! This is not correctly modeled. The actual use of write only registers has largely been made in the belief that all SID registers are readable. To support this belief the read would have to be done immediately after a write to the same register (remember that an intermediate write to another register would yield that value instead). With this in mind we return the last value written to any SID register for $2000 cycles without modeling the bit fading. |
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ChristopherJam
Registered: Aug 2004
Posts: 1409 |
Oh, damn. Thanks for that, Fred.
I guess you could safely write 0 then 1 if you first wrote a zero to some other SID register before INC $d404, but this is all sounding a bit flaky now :) |
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tlr
Registered: Sep 2003
Posts: 1790 |
Are we counting things like inc $d016;dec $d016 in this btw? More related to BA i guess but if there weren't so many dummy cycles it wouldn't work. |
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