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Forums > C64 Coding > $D016 bit 5
2023-08-05 18:22
Krill

Registered: Apr 2002
Posts: 2980
$D016 bit 5

There is this mysterious bit early on in the KERNAL reset routine:
FCEF: 8E 16 D0  STX $D016     ; VIC: Control Register 2
with X being anything in [0..5].

Now, some people [who?] claim that without this store to $d016, some [which?] cartridges won't start [citation needed].

However, $D016 apparently used to have a mysterious "reset bit" in supposedly early VIC-II revisions (those with only 5 not 9 luma steps, and then the early ones of those).
   | Bit  5   |    Reset-Bit: 1 = Stop VIC (no Video Out, no RAM  |
   |          |                   refresh, no bus access)         |
Could this be the reason why some things on some machines (?) won't start without that store to $D016?
Do any machines still exist where setting $D016 to, say, $f8 would crash them (when running code from RAM)?
Or did this "reset bit" never exist? =)
 
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2023-08-07 05:03
Martin Piper

Registered: Nov 2007
Posts: 722
Is it refresh related? Yes it is, as per the datasheets:

Datasheet 1: http://datasheet.elcodis.com/pdf2/73/0/730070/hm4864-2.pdf
"*Any cycle* in which *_RAS signal* occurs *refreshes* the entire row."

It doesn't matter if it is _RAS only or not, it is still a refresh.


Datasheet 1: https://www.datasheetarchive.com/pdf/download.php?id=8e4d8a58a2..
"Strobing each of the 256 row addresses with *_RAS* causes all bits in each row to be *refreshed*"


Post #33 in https://csdb.dk/forums/?roomid=7&topicid=89189&showallposts=1
At -59.81us to -59.8us where RAS goes from 1 to 0, per the datasheets, is enough to start the process of *refresh* for that row address.


What this means is that any _RAS (low RAS) is by definition refresh related.
2023-08-07 09:31
Martin Piper

Registered: Nov 2007
Posts: 722
The NEC PD4164-2 datasheet also confirms it is refresh related... https://datasheetspdf.com/pdf-file/1098100/NEC/UPD4164-2/1

Mentioned by the C64 service manual page 22: https://www.retro-kit.co.uk/user/custom/Commodore/C64/manuals/C..



Refreshing is accomplished by:
Performing *_RAS only* refresh cycles
hidden refresh cycles
or *normal read* or write cycles


So any VIC reads that use _RAS (obviously) are refreshing, hence the problem is refresh related. As I said, refreshing doesn't just happen during the 5 VIC refresh slots per raster line.
2023-08-07 16:10
Jetboy

Registered: Jul 2006
Posts: 337
OMG! OMG! THERE IS PERSON WRONG ON THE INTERNET!
2023-08-07 18:16
Monte Carlos

Registered: Jun 2004
Posts: 360
So, is this thread actually becoming out of topic? The actual question was about a d016 bit and not HSP.
2023-08-07 18:18
Monte Carlos

Registered: Jun 2004
Posts: 360
It's good to have different sights on the same thing, although if it gets a one man show, the constructive discussion suffers a lot.
2023-08-07 19:15
Krill

Registered: Apr 2002
Posts: 2980
What iAN CooG and Monte Carlos said.

Quoting Groepaz
AFAIK this bit is only needed/used in the VICII of the MAX Machine. If at all :)
Quoting tlr
The reset bit does not do anything on the 6569R1. I'm guessing early 6567's, maybe only prototypes even?

How likely is it that some (NTSC) C-64 have one of those early VIC-II revisions?
And if unlikely, why could a cartridge fail to start without that store to $d016?
2023-08-07 19:36
chatGPZ

Registered: Dec 2001
Posts: 11386
Quote:
How likely is it that some (NTSC) C-64 have one of those early VIC-II revisions?

"uncommon but not rare" :) The first batch(es) had the early VICIIs (obviously) - whats probably unlikely is that someone is still using these (64 cycles and everything)
Quote:
And if unlikely, why could a cartridge fail to start without that store to $d016?

Could be as simple as "some broken code relies on the value in the register", who knows - i'd like to know who made those claims about which cartridges though (that would give us a chance to answer that question, perhaps).
2023-08-07 20:38
Krill

Registered: Apr 2002
Posts: 2980
Quoting Groepaz
i'd like to know who made those claims about which cartridges though (that would give us a chance to answer that question, perhaps).
Will ask them to chime in. One of the best current coders on this machine, though, with many games under the belt. =)
Was stumped as well by a bug report of one of the testers and the fix.

Some sort of (yet unemulated) VIC-II startup state (unrelated to the reset bit) that only gets unlocked by a store to $D016 is ruled out?
2023-08-07 21:28
chatGPZ

Registered: Dec 2001
Posts: 11386
I'd never rule out weird things like that.... That strange behaviour with one of the sprites that some VICII show was also quite unexpected :)

But as said, without knowing more details its all (a bit pointless) speculation. Once we know these, we can knock up tests and ask people to run them - and we can find out what exactly is happening.
2023-08-08 10:30
Martin Piper

Registered: Nov 2007
Posts: 722
http://janklingel.de/wordpress/wp-content/uploads/2020/08/MOS-6..

"The RES bit (bit 5) of register $d016 has no function on the VIC 6567/6569 examined as yet. On the 6566, this bit is used to stop the VIC."

6566...

Wikipedia: "MOS Technology 6566 – designed for SRAM/non-muxed address lines (used in the MAX Machine)"

So... SRAM, no need for refresh, by normal reading or by scheduling forced row address _RAS strobes.
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