In the first phase of cycle 14 of each line, VC is loaded from VCBASE (VCBASE->VC) and VMLI is cleared. If there is a Bad Line Condition in this phase, RC is also reset to zero.
If there is a Bad Line Condition in cycles 12-54, BA is set low and the c-accesses are started.
Originally I was thinking if it would be possible to have badlines and normal 8 line tall characters, but have the DMA always load the character pointers from the same address in the selected screen memory. (ie. have VCBASE to be constantly 0)
thats pretty cool, but how do you make stack the first line or align it to a row. linecrunch 3 rows, but then the stack still starts at char 16, so linecrunch and vsp? pretty fucked up but cool at the same time. but one can have the screen just at zp, same amount of cycles and less hw fuck.