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2011-08-30 22:02

Norrland

Registered: Aug 2011
Posts: 14

problems w. opening sidebordes+sprites

Hi there! First post here, but bare with me, I'm gonna spam you with some questions on semi-newbie level for a while..

I'll start with my problems with opening the sideborder. I'm showing a bitmap picture and the plan is to have 4 sprites in the sideborder, in the middle of the screen, all on the same y-pos. I have managed to make a stable irqroutine and have set $d015 to #$f0 to enable sprites 4-7 (sprites in order, the ones with lowest prio). I've also made sure that sprites 0-3 have totally different y-pos than sprites 4-7.
Later down the screen, at the same position as the sprites, I open the border with dec/inc $d016 (cycle 56), and everything goes well for the normal lines, but on bad lines I'll be 3 cycles late (if I've understood everything right) even though I do dec/inc $d016 right after the last lines dec/inc.
I've tried to follow Christian Bauers (+codebase, c-hacking, posts here and others) texts about the vic, rastertiming and opening borders, but I don't understand what I do wrong. In my code I'll do 20 nops between the dec/inc, which in my head equals to 52 cycles including dec/inc, and if that is right, suggests that the vic uses 11 cycles (63-52=11) (2/sprite and 3 for BA signal??) for fetching spritedata for 4 sprites on non-badlines.
If my calculations are right, I don't understand why I have problems on badlines, were I should have 23 cycles(?). Even if I skip one sprite, I'm still one cycle late, and I've read that 4 sprites should be possible..

The code inside irq, and screenshot showing my timing:

dec $d021 ;row1
inc $d021

.byte $ea, $ea, $ea, $ea, $ea, $ea, $ea ;20 st (40 cycles)
.byte $ea, $ea, $ea, $ea, $ea, $ea, $ea
.byte $ea, $ea, $ea, $ea, $ea, $ea

dec $d021 ;row2 6 cycles
inc $d021 ; 6 cycles,tot 52

.byte $ea, $ea, $ea, $ea, $ea, $ea, $ea ;20 st (40 cycles)
.byte $ea, $ea, $ea, $ea, $ea, $ea, $ea
.byte $ea, $ea, $ea, $ea, $ea, $ea

dec $d021 ;row3 6 cycles
inc $d021 ; 6 cycles,tot 52

dec $d020 ;row 4 BADLINE hell breaks loose... (nåja)
inc $d020

http://i1120.photobucket.com/albums/l491/lordborak/kastabort.png

Is my understanding right? Do I need to consider/setup anything else than described above?

... 25 posts hidden. Click here to view all posts....

2011-08-31 19:50

Norrland

Registered: Aug 2011
Posts: 14

Damn it!! I knew I did something wrong, I just didn't realize that I wasn't wasting the cycles with enough style... I probably become better on that in the future, but meanwhile, I'll stick to the NOPs...

Big thanks for the solution, works great! And I'll be using your tip with "delaytable" in the future when in need of careful timing.

You talk about beer, I want beer, you write crazy opening- sideborder-routines, my program works, everyone is happy!, but I still don't _understand_ why I don't have enough cycles left on badlines, 23 cycles should be enough for spritefetching & dec/inc? Does someone have a suggestion?

2011-08-31 20:13

Radiant

Registered: Sep 2004
Posts: 639

H Macaroni: Well, how many cycles you have available on a badline depend on what your code looks like, especially if you also have sprites enabled. :-) The key is the BA line on the VIC-II; BA turns low three cycles before the VIC needs exclusive memory access. If the CPU executes a read cycle while BA is low it stalls and AEC is set to low until the VIC is finished with its business, where the CPU will continue from where it was. Therefore you have 20-23 cycles available on a badline with no sprites, depending on your code.

2011-08-31 20:21

MagerValp

Registered: Dec 2001
Posts: 1078

delay44:
        nop
        jsr :+
:       jsr :+
:       rts

2011-08-31 21:03

Norrland

Registered: Aug 2011
Posts: 14

radiantx: thx

2011-09-01 06:48

JackAsser

Registered: Jun 2002
Posts: 2014

Quote: delay44: nop jsr :+ : jsr :+ : rts

Cool! Removed my post regarding how to calc when I realized my mistake...

2011-09-01 08:11

Radiant

Registered: Sep 2004
Posts: 639

MagerValp: Mind = blown

2011-09-01 08:33

Frantic

Registered: Mar 2003
Posts: 1648

@Magervalp: Nice, yes! Stylish, yes! I think I have seen this kind of delay code before somewhere though. Am I right? Is it in some routine in C=Hacking or something?

Anyway.. I don't think your particular little routine is correct. :) Unless you call the routine with a JSR, there will be one RTS too much and you'll end up in stack space when RTS'ing to Eternia. ...but if you DO call the routine with a JSR it will waste a total of 44+6 cycles (with the initial JSR to the routine included) rather than 44 cycles. ...or did I miss something? Maybe this is actually how it was supposed to be?

Not as elegant, but unless I did some mistake, this routine should provide a relatively stylish wasting of 44 cycles (with the initial 6 cycles of the JSR to the waste44 routine included):

		[SOME CODE HERE]
		jsr waste44
		[SOME CODE HERE]


waste44:	;the routine is 9 bytes
		nop
		jsr :+
		jsr :+
:		nop
		rts

2011-09-01 09:58

WVL

Registered: Mar 2002
Posts: 902

check!

6 jsr delay44

2 nop
6 jsr 1
2 nop
6 rts

6 jsr 2
2 nop
6 rts

2 nop
6 rts

total : 44

2011-09-01 11:31

MagerValp

Registered: Dec 2001
Posts: 1078

Yes, it depends on if you count 6 cycles of the calling jsr or not. I couldn't be arsed to count the cycles of the previous examples :P

Don't know if I found it somewhere or if I thought of it myself.

2011-09-01 14:35

TWW

Registered: Jul 2009
Posts: 545

Dealy44:
    lda #%00010000
    sec
    ror
    // PAGEBREAK HERE
    bcc *-1
    rts  // A exits with #8 and done in 7 bytes.

Another variant with 1 byte less ;-)

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