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ChristopherJam
Registered: Aug 2004
Posts: 1402 |
SEI considered harmful.
Once more for the people at the back:
Don't wrap your interrupt initialisation with SEI/CLI.
It's a bad way to avoid interrupts being dispatched while you're changing the IRQ pointer, because it then requires additional code to acknowledge any pending CIA IRQs that might trigger between the SEI being executed and you turning off the CIA timer or interrupt enable.
If you're coming from BASIC, just do this instead:
lda #$7f
sta $dc0d
..then change $01, set your IRQ pointer(s), and init your own raster and/or timer IRQ(s)
If you're coming from a previous part, ask your teammate to turn off any IRQs and acknowedge any requests before they pass the baton (cf 'IRQ recovery' link below) - then all you need to do is set up your own IRQ.
As previously flogged to death at
TIL: The instruction after SEI can be executed before a pending IRQ is handled
C-64 coding cargo cults
Best practice IRQ recovery |
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ChristopherJam
Registered: Aug 2004
Posts: 1402 |
So yes, SEI guarantees atomicity, but that doesn't make a difference coming from BASIC, and while it does defend against the following hypothetical:
Quoting Martin PiperIn theory it could be the case that even if the $dc0d source is disabled in the mainline (outside the IRQ), a raster IRQ could be triggered which then enables the $dc0d source before it returns, which then means a mainline VIC trigger disable would not guarantee the IRQs are really off.
..it doesn't defend against the same hypothetical with dd0d substituted for dc0d - especially if the ISR also overrides RTI restoring I. Really, if a previous part is messing with those sorts of techniques, it needs to shut itself down properly before handing over control to the next part.
Excellent point from Krill about how you really should be acknowledging prior VIC interrupts before you set up your own - I nearly added to my initial post that you should also ensure that your interrupt setup code isn't getting in the way of when you expect your first IRQ to hit too (eg by waiting on $d012 before you start writing to d011/12/19/1a).
And yes, music handover is important if you don't want to fuck with the timing - it's just as important to avoid double calling as it is to avoid frameskip, and either way it's probably a bigger discussion than just "do this magic at init time" (eg, what happens if you need to spend a couple of frames unrolling some code or data? Who is responsible for continuing to play the tune, while not trashing other things?) |
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Martin Piper
Registered: Nov 2007
Posts: 698 |
I think for the first part of a multi-part demo, the initial load, boot or whatever, there needs to be a very robust init which would include the "large" SEI/kill stuff/CLI arrangement.
But for all subsequent parts, as long as a IRQ/NMI contract can be agreed, then there doesn't need to be such a robust init. Actually in such situations there might even be sections of memory that are kept consistent with their IRQ/NMI carrying on things like music etc. |
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ChristopherJam
Registered: Aug 2004
Posts: 1402 |
Yes, basically big productions need team-wide guidelines on handover.
But for simple one-filers or intros? Just poke $dc0d,127, wait for $d012 to go negative, then set up your raster IRQ.
(ok ok, and if you must insist on SEI, don't forget to lda $dc0d after you write to it) |
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spider-j
Registered: Oct 2004
Posts: 482 |
Quoting KrillMeaning that when you don't clear the latch by writing a 1-bit to $D019 bit 0, the interrupt will trigger immediately after unmasking it via LDA #1 : STA $D01A.
This here should be okay then – writing #1 to $D019 first, then $D01A:
init_irq: lda irq_lines
sta 0xD012
sta irq_plus_cmp+1
inc irq_plus_cmp+1
lda #<irq
sta 0xFFFE
lda #>irq
sta 0xFFFF
lda #0x0B
sta 0xD011
lda #0x01
sta 0xD019
sta 0xD01A
rts
Or isn't it? |
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Krill
Registered: Apr 2002
Posts: 2940 |
My point was that the raster interrupt...
lda #0x01
sta 0xD019
; ... may trigger here
sta 0xD01A
; ... and then fire only here
rts
Should usually not be a problem, but... =) |
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spider-j
Registered: Oct 2004
Posts: 482 |
Okay. But I guess in my typical setup:
init mem –>
basicfade that ends with screen off (bit 4 of $D011 = 0) –>
setup IRQ chain –>
screen is turned on within the IRQs
that should never be a problem, because you can't turn on the screen in the middle of a frame. So if the IRQ chain is messed up in the first frame, it wouldn't matter, because screen is at the earliest turned on in the second frame anyway.
Or can you somehow trigger one of those "illegal" graphics mode while having bit 4 / $D011 zero in the middle of a frame? *scratchesHead* |
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MagerValp
Registered: Dec 2001
Posts: 1065 |
Some of you seem to be conflating initial basic startup, and linking a multipart demo. Basic startup can be reduced to a short piece of boiler plate, that yes, doesn't include sei/cli. Demo linking is however a completely different beast where anything goes and it's hard to make any authoritative statements. Linking without music skipping and hard to debug race conditions is an artform.
And good point about there being an unacknowledged raster irq waiting for you at startup, pretty sure that one has messed with me before. Initial state, state changes, and order of operations are critical when setting up irqs. For raster irqs I usually do a simple wait for $d012 to $ff before setting up. |
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spider-j
Registered: Oct 2004
Posts: 482 |
Quoting MagerValpLinking without music skipping and hard to debug race conditions is an artform.
That's correct. But I feel it would be less of a challenge if everyone in your group would properly setup and exit their parts as you instructed them to :-) |
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ChristopherJam
Registered: Aug 2004
Posts: 1402 |
Quoting KrillMy point was that the raster interrupt...
lda #0x01
sta 0xD019
; ... may trigger here
sta 0xD01A
; ... and then fire only here
rts
Should usually not be a problem, but... =)
True, but given that Spider Jerusalem already set $d012 to his desired raster line, that will only happen if that line starts just after the sta $d019 - which means it'll be happening at close enough to the desired time anyway. No need to fear for midscreen weirdness from an interrupt triggered on the wrong line altogether, as can happen without the Krill Precaution™ :D
(interestingly, according to some experiments I've just been doing, the RTS is executed before the interrupt service routine!) |
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spider-j
Registered: Oct 2004
Posts: 482 |
Just found this looking through our old trackmo framework documentation:
XD |
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