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MagerValp
Registered: Dec 2001
Posts: 1078 |
FIFOgfx (with live C64 debugging)
A friend of mine built his own 6502 computer and he talked me into making a graphics card for it. I've connected my prototype via a cartridge to the C64, and a side effect of how I'm interfacing it means that the C64's memory is mirrored into a Raspberry Pi, making it possible to inspect its memory live. I realized that this might potentially be even more interesting than the main project, but I haven't had time to fully explore it as I'm focusing on finishing the gfxcore first. I've started releasing my project files on GitHub if anyone wants to play along:
https://github.com/MagerValp/fifogfx |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
"mirrored" .... but read only, right? |
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Oswald
Registered: Apr 2002
Posts: 5094 |
interesting how it is possible to mirror 64k "live" ? |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
i havent looked - but what i would do is just looking for write accesses and then reproduce them locally (in the "mirrored" RAM). ie, you dont have to actually "mirror 64k" |
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MagerValp
Registered: Dec 2001
Posts: 1078 |
Yes, read only mirror. Groepaz is spot on, I capture all writes on the bus and copy them to a 64k mirror buffer. I haven't verified that it actually works, but I implemented simple $01 logic as well, to capture I/O writes to a separate buffer.
But this was really just a happy accident while making the graphics card :) |
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Skate
Registered: Jul 2003
Posts: 494 |
This could be very useful actually. There are similar realtime monitoring solutions for emulators but monitoring the real thing is completely a new level.
Thanks for sharing your project MagerValp. |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
Quote:I haven't verified that it actually works, but I implemented simple $01 logic as well, to capture I/O writes to a separate buffer.
i'd be surprised if that does anything useful :) writes to the CPU port can not be "seen" on the BUS (only the address, not the data IIRC) - which is the main reason for why the chameleon became what it is, the only way to know about the state of the CPU port is to "look into the CPU". |
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JackAsser
Registered: Jun 2002
Posts: 2014 |
Quote: Quote:I haven't verified that it actually works, but I implemented simple $01 logic as well, to capture I/O writes to a separate buffer.
i'd be surprised if that does anything useful :) writes to the CPU port can not be "seen" on the BUS (only the address, not the data IIRC) - which is the main reason for why the chameleon became what it is, the only way to know about the state of the CPU port is to "look into the CPU".
One could solder the unit directly on the inputs or the outputs of the PLA to know the state of $01 though, if you really wanna debug. Or on the various chip select signals for that matter. A bit intrusive, but possible. |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
yes, thats the common solution (used by eg SCPU) |
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JackAsser
Registered: Jun 2002
Posts: 2014 |
Quote: yes, thats the common solution (used by eg SCPU)
Aha, didn't know it jacked in that hard. :) |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
for SCPU128 its even funkier.... it needs to "bypass" the MMU, so it comes with an adapter for that and plenty wires routed inside the computer... |
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