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Forums > C64 Coding > Improved clock-slide
2017-02-28 07:21
lft

Registered: Jul 2007
Posts: 369
Improved clock-slide

If you use timer-based jitter correction, or just VSP, here's a way to shave off one cycle:

http://codebase64.org/doku.php?id=base:improved_clockslide
2017-02-28 07:40
oziphantom

Registered: Oct 2014
Posts: 490
There is a special satisfaction for when one makes a thorn into a rose... the French probably have a word for it... but that is what I felt when I read that.
2017-02-28 09:50
Trash

Registered: Jan 2002
Posts: 122
Not only a cycle, a byte also...
2017-02-28 09:51
chatGPZ

Registered: Dec 2001
Posts: 11386
that optimization is so obvious... i feel silly now :(
2017-02-28 09:56
JackAsser

Registered: Jun 2002
Posts: 2014
Now put that bpl at $00ff to shave off another byte and cycle and do the jitter-compensation and IRQ-handling on $01xx.
2017-02-28 10:13
lft

Registered: Jul 2007
Posts: 369
I'm afraid that would leave the page-boundary in the wrong place.
2017-02-28 10:47
Martin Piper

Registered: Nov 2007
Posts: 722
Nicely done. Bravo.
2017-02-28 13:49
JackAsser

Registered: Jun 2002
Posts: 2014
Quote: I'm afraid that would leave the page-boundary in the wrong place.

True. at $00fx then. But this of course applies to the standard method aswell.
2017-02-28 14:58
Copyfault

Registered: Dec 2001
Posts: 478
So simple, so beautiful ;)

Now that I come to think of this, it should be possible to shave off another byte by utilising that other additional branch cycle (in case of a taken branch).

Assuming that the accu holds the no. of bytes to skip (which is common for this approach) we could do the following:
;-----------------------------
;A=0..n-1=no.of bytes to skip
;must have been calculated
;directly before to ensure
;correct setting of the z-flag
;-----------------------------
     sta bra+1
bra  bne *
     nop       ;2 cycles
     lda #$a9  ;2
     lda #$a9  ;2
     lda #$a9  ;2
     lda $ea   ;3
;-----------------------------
;page break here
;-----------------------------
code ...

If A=0, the branch is not taken; thus the total sum of cycles will be 11. In case of a non-vanishing A, the NOP-instruction is skipped (-2 cycles) but the additional "branch taken"-cycle comes in. Mind that if you want to slide down to 2 cycle-delay the page break is mandatory! A one-cycle delay is not possible but this is the same with the "BPL"-instruction which always comes with that additional cycle.
2017-02-28 15:07
Frantic

Registered: Mar 2003
Posts: 1648
I think the best part is that LFT wrote a Codebase article about it *before* I had to ask him about it.
2017-02-28 19:56
lft

Registered: Jul 2007
Posts: 369
Copyfault, that is an excellent improvement!
 
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