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TWW
Registered: Jul 2009
Posts: 545 |
The big VICE & SuperCPU Thread
I open this thread so coders may share information and issues regarding the Vice SuperCPU Emulator.
I found 2 issues;
The TCD command doesen't work. PHA/PLD works fine. Tried the XBA tp make sure there was no funny business with the C register beeing mixed up but same result.
I did a wipe-mem routine which clears memory. Obviously a 16 bit STZ DP is the way to go and just relocating the ZP for each page you wipe. However a dumb 16 bit STZ Abs,x (2 cycles more/instruction) is faster then a loop with roughly 20 cycles overhead. The math doesen't add up as the DP aproach consumes less cycles acc. to ref. material. Can it be the RAM refresh and branching which causes aditional wait times (I read somewhere that a RAM Refresh takes 8 cycles) which causes the deviation? |
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enthusi
Registered: May 2004
Posts: 677 |
I shall write a demo that utilizes warp-mode and RAM-injection of vice. |
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AmiDog
Registered: Mar 2003
Posts: 97 |
The SuperCPU64 has 128KB of SRAM and the SuperCPU128 (which also works on the C64) has 256KB. Bank $01 is described as "PseudoROM, RAM" and should basically contain a copy of the C64 ROMs for performance reasons.
I remember trying to use bank $01 for some timing sensitive code back in 2005/2006 or so, but it failed for some reason. Does anyone know if bank $01 is write-protected somehow, or if the SuperCPU does treat bank $01 in some special way making it hard/impossible to use for custom code? Perhaps parts of bank $01 can be used?
Since I wasn't using any ROM routines, I kind of assumed I should be able to use bank $01 for my own code, since the SuperCPU really only needs to remap bank $00 ROM accesses to bank $01 ones and shouldn't need to mess with direct bank $01 accesses at all. |
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