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Forums > C64 Coding > [C128] Irq question ...
2019-05-07 21:57
Flavioweb

Registered: Nov 2011
Posts: 463
[C128] Irq question ...

How can i make this code run on a C128 exactily at same addressess?
(I hope this isn't too much off-topic here...)
.C:3000  78          SEI
.C:3001  A9 7F       LDA #$7F
.C:3003  8D 0D DC    STA $DC0D
.C:3006  A9 00       LDA #$00
.C:3008  8D 14 03    STA $0314
.C:300b  A9 40       LDA #$40
.C:300d  8D 15 03    STA $0315
.C:3010  A9 FF       LDA #$FF
.C:3012  8D 12 D0    STA $D012
.C:3015  A9 01       LDA #$01
.C:3017  8D 1A D0    STA $D01A
.C:301a  4E 19 D0    LSR $D019
.C:301d  58          CLI
.C:301e  4C 1E 30    JMP $301E

.C:4000  EE 20 D0    INC $D020
.C:4003  EE 21 D0    INC $D021
.C:4006  AD 12 D0    LDA $D012
.C:4009  CD 12 D0    CMP $D012
.C:400c  F0 FB       BEQ $4009
.C:400e  CE 20 D0    DEC $D020
.C:4011  CE 21 D0    DEC $D021
.C:4014  4E 19 D0    LSR $D019
.C:4017  4C 33 FF    JMP $FF33
2019-05-07 23:27
Krill

Registered: Apr 2002
Posts: 2980
Not sure what your problem is, but the BASIC ROM on C-128 is at $4000, so you want to disable it in order to use the interrupt handler:
lda #$02
sta $ff00
What's the background of your question?
2019-05-07 23:37
Flavioweb

Registered: Nov 2011
Posts: 463
The problem is here:
ff17  48          PHA                - A:00 X:17 Y:00 SP:17   -  I  
ff18  8A          TXA                - A:00 X:17 Y:00 SP:16   -  I  
ff19  48          PHA                - A:17 X:17 Y:00 SP:16   -  I  
ff1a  98          TYA                - A:17 X:17 Y:00 SP:15   -  I  
ff1b  48          PHA                - A:00 X:17 Y:00 SP:15   -  IZ 
ff1c  AD 00 FF    LDA $FF00          - A:00 X:17 Y:00 SP:14   -  IZ 
ff1f  48          PHA                - A:00 X:17 Y:00 SP:14   -  IZ 
ff20  A9 00       LDA #$00           - A:00 X:17 Y:00 SP:13   -  IZ 
ff22  8D 00 FF    STA $FF00          - A:00 X:17 Y:00 SP:13   -  IZ 
ff25  BA          TSX                - A:00 X:17 Y:00 SP:13   -  IZ 
ff26  BD 05 01    LDA $0105,X        - A:00 X:13 Y:00 SP:13   -  I  
ff29  29 10       AND #$10           - A:20 X:13 Y:00 SP:13   -  I  
ff2b  F0 03       BEQ $FF30          - A:00 X:13 Y:00 SP:13   -  IZ 
ff30  6C 14 03    JMP ($0314)        - A:00 X:13 Y:00 SP:13   -  IZ

at $FF20 kernal set $FF00 to $00 turning on BASIC again...

There is a way to avoid this but having kernal (not BASIC) rom active?
2019-05-07 23:42
Krill

Registered: Apr 2002
Posts: 2980
Ah, i see. Then you either want to disable the KERNAL ROM as well and have your entirely own interrupt handler with the vector at $fffe, or you let the vector at $0314 point to a thunk residing anywhere below $4000, which would disable the BASIC ROM and then jump to the actual handler at $4000.
2019-05-07 23:50
Flavioweb

Registered: Nov 2011
Posts: 463
I need to have kernal on but basic off, using vector at $0314 to point the IRQ routine at $4000...
2019-05-07 23:55
Krill

Registered: Apr 2002
Posts: 2980
Okay, XY problem solving time. What is your _actual_ problem you're trying to solve?
2019-05-08 00:14
Flavioweb

Registered: Nov 2011
Posts: 463
I'm experimenting using CC65 with a mix of C and assembly code.
An IRQ handler that setup one raster irq is called by C code.
Compiled C code starts with:
.C:1c0d  A9 0E       LDA #$0E
.C:1c0f  20 D2 FF    JSR $FFD2
.C:1c12  AD 00 FF    LDA $FF00
.C:1c15  48          PHA
.C:1c16  A9 0E       LDA #$0E
.C:1c18  8D 00 FF    STA $FF00

so ROMS are OFF.
Irq setup code starts at $4xxx and looks like:
.C:4011  A9 7F       LDA #$7F
.C:4013  8D 0D DC    STA $DC0D
.C:4016  78          SEI
.C:4017  A9 44       LDA #$44
.C:4019  8D 14 03    STA $0314
.C:401c  A9 40       LDA #$40
.C:401e  8D 15 03    STA $0315
.C:4021  A9 64       LDA #$64
.C:4023  8D 18 03    STA $0318
.C:4026  A9 40       LDA #$40
.C:4028  8D 19 03    STA $0319
.C:402b  A9 01       LDA #$01
.C:402d  8D 1A D0    STA $D01A
.C:4030  A9 1B       LDA #$1B
.C:4032  8D 11 D0    STA $D011
.C:4035  A9 FC       LDA #$FC
.C:4037  8D 12 D0    STA $D012
.C:403a  AD 0D DC    LDA $DC0D
.C:403d  A9 0E       LDA #$0E
.C:403f  8D 00 FF    STA $FF00
.C:4042  58          CLI
.C:4043  60          RTS

which have a (now i know) useless $FF00 write at $403d.

After CLI at $4042, first time IRQ is triggered i have BASIC rom turned ON by kernal IRQ code... and all fucks up.

There is a way to keep BASIC OFF?
2019-05-08 08:45
Krill

Registered: Apr 2002
Posts: 2980
But why must your interrupt handler start at $4000 and not, say, $3f80? And is that interrupt handler thunk/trampoline i mentioned not an option?
2019-05-08 09:14
Flavioweb

Registered: Nov 2011
Posts: 463
Because it look a really stupid thing to me...
I take it as last chance. Is a useless waste of cycles.
If i want to use ram under basic i need to set a code in the ram accessible by defalut, then set $FF00 and jmp to irq code.
I'm trying to understand if there is a way to "reconfigure" the bank activated by $00 in $FF00 to keep only kernal ON...
But is just my guess... i don't know if there is a way to do it...
2019-05-08 09:27
Krill

Registered: Apr 2002
Posts: 2980
There isn't.

If the number of cycles is a problem for you, why not disable the ROM altogether and have your own interrupt handler called directly via $fffe/f? Would both consume a minimal amount of cycles and not have the BASIC ROM problem.
2019-05-08 09:53
Krill

Registered: Apr 2002
Posts: 2980
Besides, having interrupt handlers below $4000 (or at $c000+) is a good idea because of the two RAM banks. You really want to enable a common area (configurable to up to 16K) and put your interrupt handlers there, otherwise having interrupt handlers in one bank and the code being interrupted in another could be a bit of a nuisance.
2019-05-08 11:29
oziphantom

Registered: Oct 2014
Posts: 490
yeah its a flaw in the KERNAL sadly.. it should have been something like
ff1c  AD 00 FF    LDA $FF00          - A:00 X:17 Y:00 SP:14   -  IZ 
ff1f  48          PHA                - A:00 X:17 Y:00 SP:14   -  IZ 
ff20  8D 00 FF    STA $FF04          - A:00 X:17 Y:00 SP:13   -  IZ

but then it has issues as well. Another flaw of this is it assumes the Stack is at $100 which isn't always true either.. and can lead to fun "why did the monitor just start" scratching head sessions - the lack of chis on x128 can really hurt sometimes.

I remember Bil Herd saying that post release he ask Fred why he didn't use the MMU, and his response was "Because there are no Kernal only registers", to which Bil responded "Why didn't you tell me.."

The handy thing with the Pre Configs is they don't trash a register, so you could put your IRQ at $3FFD
0:3FFD sta FF02 <- disable BASIC LO, HI,EDITOR,MONITOR
0:4000 pha
0:4001 tax
.....
You need to set up the PreConfigs to be what you want first, but it only adds 4 clocks
2019-05-08 12:38
Flavioweb

Registered: Nov 2011
Posts: 463
WTF they choosed to force ROMS ON anyway!?!
If i disable the roms and computer crashes ... are just my businness!
If i want to setup a IRQ under ROMS the only way is to disable kernal... or put a "trampoline" in a ram area...
If i need kernal in other parts of my code, outside the irq, the only solution is to have a trampoline somewhere...
/o\
2019-05-08 13:40
Oswald

Registered: Apr 2002
Posts: 5094
well trampoline it, you only waste some bytes in ram, you can even enter the rom irq faster by bypassing some of it.
2019-05-08 13:58
oziphantom

Registered: Oct 2014
Posts: 490
If you know its not going to be used, you can set up the JMPFAR routine $02/$03/$04 bank lo hi and just point the IRQ vector to x:02e3
2019-05-08 13:59
Krill

Registered: Apr 2002
Posts: 2980
Just have a two-fold approach.

- KERNAL disabled would go to your actual interrupt handler directly via $fffe/f.
- KERNAL enabled would go to the ROM interrupt handler, then to the trampoline via $0314/5, which would then go to the actual interrupt handler.

This way, you're only using the cycles you really need to use while allowing both KERNAL on and off.
2019-05-08 13:59
oziphantom

Registered: Oct 2014
Posts: 490
But yes, welcome to the 128, it has ROM EVERYWHERE, however you can switch out the CHARGEN EVERYWHERE as well which is nice.
2019-05-08 17:48
JackAsser

Registered: Jun 2002
Posts: 2014
Quote: Just have a two-fold approach.

- KERNAL disabled would go to your actual interrupt handler directly via $fffe/f.
- KERNAL enabled would go to the ROM interrupt handler, then to the trampoline via $0314/5, which would then go to the actual interrupt handler.

This way, you're only using the cycles you really need to use while allowing both KERNAL on and off.


This is exactly what I do in EotB and my oen handler mimics the kernel so that timing is the same (not c128 related)
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