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Dwangi
Registered: Dec 2001
Posts: 130 |
illegal opcodes that f
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Dwangi
Registered: Dec 2001
Posts: 130 |
hmm sorry something went wrong here the topic should be "illegal opcodes that fuxx up or something" :)
Anyway.. can anyone tell me any illegal opcodes that works fine on a c64 but that dont work on c128?
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Ninja
Registered: Jan 2002
Posts: 411 |
Try looking here:
http://mars.wiwi.uni-halle.de/ec64/technical/aay64/c64/ibmain.h..
The instable opcodes are marked, dunno if they fail on C128 only... |
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
http://oxyron.net/graham/opcodes.html
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
forgot to say: the blue marked opcodes are unstable but still usuable (like SHX/SHY which is used quite often), the red marked ones are completely unusable atleast on some machines.
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Ninja
Registered: Jan 2002
Posts: 411 |
graham: could you please give me a hint what SHX/SHY could be used for when from time to time the "&H" is dropped? |
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
Quote: graham: could you please give me a hint what SHX/SHY could be used for when from time to time the "&H" is dropped?
the "&H" is only an unwanted side-effect which originally wasn't supposed to be.
SHX and SHY should have been STX (adr),Y and STY (adr),X.
due to some internal trouble in the 6502 core the value which is going to be stored to ram is on the internal cpu bus at the same time as the incremented high-byte of the adress. this results in a logical AND in most cases.
These two opcodes exist in legal form for zeropage adresses, but sometimes you could use them for other memory aswell, so if you really badly need them, you use SHX or SHY and choose an adress which doesn't harm the values you want to store (usually that would be $3E00, $7E00 or $FE00). for example, oneder uses these illegal opcodes to make some calculations a lot faster. if the demo is run on a cpu which doesn't have these illegal opcodes, an alternative code is executed which is slower, but i think this doesn't matter because that usually would mean that the demo is run on supercpu or something similar.
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Ninja
Registered: Jan 2002
Posts: 411 |
Graham: Thanx! That is a fucking cool trick :)
So, it looks like the 6502-designers at least tried to implement STX xxxx,Y but simply failed? |
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Stryyker
Registered: Dec 2001
Posts: 468 |
Failed? I have no idea how they make an opcode legal or illegal but if you search the online Transactor achives there is some writing on how the 6502 possible decodes the opcode (bitwise) which helps further explain all the patterns. Maybe they thought at a later date we will debug it, much like how one of the shift or roll instructions wasn't added until June 1976 or so. |
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
anyway, they never really fixed these opcodes, but they were "replaced" by STZ which usually means: store zero to ram (hardly any 6502-based cpus actually have a Z-register). this way they didn't need to fix anything, just pull everything to zero. that's also the reason why the 65816 does indeed have STX and STY indexed adressing modes, but on other opcodes. they wanted to keep the STZ's on $9C and $9E to remain compatible with previous designs. |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
btw for some weirdo opcodes in the 65xx line, checkout the HuC6280 (which is a 65c02 derivate used in NECs PCEngine) ... some neat things there. (i like the way bankswitching is done in zeropage vs i/o... kindof smart :)) |
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Kabuto
Account closed
Registered: Sep 2004
Posts: 58 |
To explain what's going on take a look at LDA ABX and STA ABX first.
LDA ABX takes 4 cycles unless a page wrap occured (address+X lies in another page than address) in which case the value read during the 4th cycle (which was read with the original high byte) is discarded and in the 5th cycle a read is made again, this time from the correct address. During the 4th cycle the high address byte is incremented in order to have a correct high byte if the 5th cycle is neccessary. The byte read from memory is buffered and copied to A during the read of the next command's opcode.
But there's a problem with storage commands: they need to put the value to write on the internal bus which is used for address computations as well. To avoid collisions STA ABX contains a fixup which makes it always take 5 cycles (the value is always written in the 5th cycle as the high byte is computed in the 4th cycle).
This fixup requires some transistors on the CPU; the guys at MOS forgot (or were unable?) to make them detect STX ABY (which becomes SHX) and a few others, they are missing that fixup so this results in a collision between the value and high address byte computation.
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
Quote: http://oxyron.net/graham/opcodes.html
@Graham:
This link seems to be dead... Did you store it anywhere else? |
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Steppe
Registered: Jan 2002
Posts: 1510 |
Try this:
http://www.oxyron.de/html/opcodes.html |
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
@Steppe:
Thanx... Too bad it doesn't state the workings of the illegal opcodes.
For example: What does AHX do? Which flags are altered? And so on... |
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
Blueehhh...
Sorry I was too quick... IT DOES STATE IT ALL!!!
Thanx again |
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Monte Carlos
Registered: Jun 2004
Posts: 359 |
What does &H mean?
Monti Carlotti |
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
Ehr... I believe the H stands for the instruction pointer (program counter). This points to the instruction in mem which is beeing executed.
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
To extend this...
The H is short for PCH (according to some other docs on the net), where PC is program counter and the H is the Highbyte of the address...
So, if the PC would be $1234, PCH = $12 and PCL = $34. |
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Monte Carlos
Registered: Jun 2004
Posts: 359 |
so a
ldx #$05
ldy #$cc
shy $fe00
means
ldx #$05
lda #$cc
and #$ff ;h+1
sta $fe00,x
????
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
ehr... No...
The program counter points to the current opcode in memory which is beeing executed by the processor...
So...
*=$1000
PC:$1000 : lda #$01
PC:$1002 : ldy #$02
PC:$1004 : shy $2000
; then shy is:
; #$02 & #$20 and stores it in $2000 |
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
NO NO... TYPO!!!
*=$1000
PC:$1000 : lda #$01
PC:$1002 : ldy #$02
PC:$1004 : shy $2000
then shy is:
#$02 & #$10 and stores it in $2000
So #$10 and not #$20
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Nafcom
Registered: Apr 2002
Posts: 588 |
Quote: NO NO... TYPO!!!
*=$1000
PC:$1000 : lda #$01
PC:$1002 : ldy #$02
PC:$1004 : shy $2000
then shy is:
#$02 & #$10 and stores it in $2000
So #$10 and not #$20
HINT: CSDb has an edit function for posts if you are the last replyer in a thread! ;) |
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MRT
Account closed
Registered: Sep 2005
Posts: 149 |
Quote: HINT: CSDb has an edit function for posts if you are the last replyer in a thread! ;)
Ha cool...
I see... |
