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andym00
Registered: Jun 2009
Posts: 45 |
CIA Timer latency ?
Just got to the root of a mysterious problem and I'm wondering why, because I've not heard about this before..
I'm using CIA1-Timer A as a trigger point for calling a scheduler serving a bunch of tasks in the background..
CIA1-TimerA is setup like this:
lda #0
sta $dc0e
sta $dc0f
lda #$7f ; Disable all interrupts..
sta $dc0d
lda #0 ; Set timer to 0 cycles..
sta $dc04
sta $dc05
lda #$81 ; Enable IRQ for Timer A..
sta $dc0d
lda $dc0d
The aim being that at any point I want to trigger a task swap I can just do:
lda #%10011001
sta $dc0e
Either to just serve background tasks in a round-robin way, or to force it to service a specific task immediately..
I'm mainly triggering it from within very high rate NMIs (where I force it to switch to a specific task), but it can also be triggered by the tasks themselves when they've completed work..
My question is this..
This test thread:
test_thread:
inc $d021
jsr Generate_Pulse_Train
jsr Generate_Pulse_Buffer
dec $d021
lda #%10011001
sta $dc0e
jmp test_thread
With the timer set to zero cycles it should underflow at the next clock cycle, by which point JMP has begun to execute and and by the time it finishes (3 cycles later) the IRQ should be pending, and should pull the non-interrupt code into the IRQ where we fall into the scheduler..
Except it doesn't.. Not instantly anyway..
The task loop above is execcuting the inc $d021 before the CIA one-shot timer trigger has invoked the interrupt.. Inserting one NOP after the sta $dcoe and before the jump makes it work as expected, but I'm wasn't aware of any latency in starting the timers like this, or latency in terms of triggering an interrupt.. Did I miss something here ?
So it appears there's some latency with either triggering a one-shot timer, the interrupt being triggered, or something else..
Has anyone got a reasonable explanation for this behaviour, because I'm unhappy with a bodgy NOP in there without knowing exactly why I need it..
And before you ask, the idea is to have 100% stable NMI timers running at 7.8K, with raster interrupts still working underneath, and with a flexible prioritised task system running underneath that :)
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WVL
Registered: Mar 2002
Posts: 902 |
Triggering IRQ's from timers depends on the CIA revision, there's 2 options : either a delay of 0 or a delay of 1. I can't remember which version did which, I only need to know that triggering IRQ's from timers cannot be depended on. Unless you determine the delay first, and adjust your code.
I remember Graham coding something like that, with adjustable timing to take care of CIA latency.
Maybe Graham can elaborate ;) |
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Cybernator
Registered: Jun 2002
Posts: 154 |
As far as I remember, there's a slight (3 cycles?) delay between setting the start bit and the timer actually beginning the count down. |
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andym00
Registered: Jun 2009
Posts: 45 |
@wvl: I've seen the stuff to detect the cia types, but that's not the issue.. I've set it to it's minimum time, and just want it to trigger asap, like the next cycle if possible..
A few more tests and it definitely appears there's a fixed delay before it starts to count down..
And Cybernator, it does appear to be 3 cycles.. With a 4 cycle instruction immediately after the write to trigger it, the code never reaches the the next instruction..
Still curious how come I've never seen this mentioned in a 6526 data-sheet, or any other document.. Time to go sifting through Vice I think :)
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Cybernator
Registered: Jun 2002
Posts: 154 |
Check this out before sifting through Vice. :)
http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/cia65.. |
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andym00
Registered: Jun 2009
Posts: 45 |
Perfect.. That's a lot clearer now..
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doynax
Account closed
Registered: Oct 2004
Posts: 212 |
I've got a quick CIA-related question and I figured I might as well post it here rather than start a new thread.
My question is just how do those time-of-day clocks work anyway?
For the moment I'm attempting to abuse the minutes and hours registers of CIA-2 to store some NMI cleanup code, hence I don't want the clock to count up too high and trash my instructions. Ideally I'd just like to stop it entirely, but I can't tell how to start the bloody thing in the first place or even what it's supposed to be clocked by for that matter.
Have you guys found any interesting uses for these things? An extra pair of timers ought to come in handy once in a while, if nothing else the alarm mode could always serve as a convenient watchdog for long-running processes.
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Stryyker
Registered: Dec 2001
Posts: 468 |
The PRG has information on read and write order. Read a register and it'll lock until a particular register is read. I can't remember off hand which one it is :( |
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yago
Registered: May 2002
Posts: 333 |
i have used cia-tod for timing, only to find out that its VERY unreliable, e.g. same c64 behaves different on different location, depending on the local power-plant
because tod-clock is clocked by power-frequency, you cant rely on it at all to be exact
i also used it as watchdog, that worked far better, because there the exact timing is not that important
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doynax
Account closed
Registered: Oct 2004
Posts: 212 |
Quoting Strykker
The PRG has information on read and write order. Read a register and it'll lock until a particular register is read. I can't remember off hand which one it is :(
Hey, I had almost forgotten about the Programmer's Reference Guide! Consider me properly chastised for not consulting the official reference guide before asking for help.
At any rate both writing to and reading from the hour register stops (or latches) the timer until the tenths-of-a-second register is dealt with. So for my particular application I merely have to be carefully never to touch the other registers.
Quoting yago
.. because tod-clock is clocked by power-frequency, you cant rely on it at all to be exact.
Let me get this straight.. They had a nice crystal available as well as a 60 Hz timer channel set up by the Kernal and they decided that the running the clock off of the god damned power frequency was the best solution!? Is that even stable enough to detect PAL/NTSC reliably? |
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Stryyker
Registered: Dec 2001
Posts: 468 |
Perhaps they were being flexible. Adjust the power supply and you could use the AC for an external trigger or counter. |
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AlexC
Registered: Jan 2008
Posts: 299 |
Quote: Perhaps they were being flexible. Adjust the power supply and you could use the AC for an external trigger or counter.
Looking at C128 design story I doubt it was intentional ;) |
