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TWW
Registered: Jul 2009 Posts: 545 |
CIA #1 Timer A settings
During IO Init, the CIA #1 Timer A is set as follows:
.C:fddd AD A6 02 LDA $02A6
.C:fde0 F0 0A BEQ $FDEC
.C:fde2 A9 25 LDA #$25
.C:fde4 8D 04 DC STA $DC04
.C:fde7 A9 40 LDA #$40
.C:fde9 4C F3 FD JMP $FDF3
.C:fdec A9 95 LDA #$95
.C:fdee 8D 04 DC STA $DC04
.C:fdf1 A9 42 LDA #$42
.C:fdf3 8D 05 DC STA $DC05
Except for the Old NTSC which sets it directly (modified KERNAL):
.C:fddd A9 1B LDA #$1B
.C:fddf 8D 04 DC STA $DC04
.C:fde2 A9 41 LDA #$41
.C:fde4 8D 05 DC STA $DC05
Can someone confirm that the DREAN uses the same method as the top one (same as PAL and NTSC)? |
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Durandal
Registered: May 2006 Posts: 30 |
On mine is the same as the top one. |
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TWW
Registered: Jul 2009 Posts: 545 |
Thanks! |
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Durandal
Registered: May 2006 Posts: 30 |
I'll ask around on the local argentine forum.
Drean mainboards came from all revisions, anything Commodore had lying around to be refurbished.
So it might not be too far fetched that there is some with an old NTSC Kernal around. |
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Durandal
Registered: May 2006 Posts: 30 |
5 Dreans checked so far, all have the normal Kernal. |
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TWW
Registered: Jul 2009 Posts: 545 |
Awesome.
As the KERNAL seem to count raster-lines (by using raster compare) to distinguish between NTSC/PAL, it should be safe to assume the DREAN uses the same setting as PAL. |