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andym00
Registered: Jun 2009 Posts: 44 |
Ultimax unleashed..
Well, someone did what I've been wanting to do for some time.. Driving VIC fetches from external memory, and stuffing register writes over the bus.. Hooray for Ultimax mode I guess :)
Always wanted to build something like this, but kudos to Laurent for acutally getting there..
https://www.youtube.com/watch?v=yy4Gr11EXHM
He's got a few videos up of it in action.. Nothing ultra crazy, but proof it's all working..
https://www.youtube.com/channel/UCDfSVxlHK9AJHPRCoGqDYZQ |
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tlr
Registered: Sep 2003 Posts: 1723 |
Quote: a wave of a single channel has that resolution, and you can manipulate 1 sid register at a time at 1 mhz...
The SID is clocked at 1 MHz so the sample rate at the output is at most 1 MHz. This gives a theoretical maximum signal frequency of 500 KHz. |
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Laurent
Registered: Apr 2004 Posts: 40 |
Speaking about the SID, if only we had a register that simply latches to a voice internal accumulator, with freq = 0 we'd have a trivial way to play 8 bits samples, and voice ADSR would be still available.
I assume back then they didn't think people would want to play PCM samples ? |
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chatGPZ
Registered: Dec 2001 Posts: 11136 |
There is hardly any memory for it in the first place :) |
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ChristopherJam
Registered: Aug 2004 Posts: 1380 |
Oh, oops. I missed that the "it" in Frantic's comment was SID. Please to ignore my NTSC remark /o\ |
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Comos
Registered: May 2004 Posts: 71 |
Isn't this a similar technique what SuperCPU actually does on the C64 bus? |
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MagerValp
Registered: Dec 2001 Posts: 1059 |
Kinda but the SuperCPU does it on the CPU half of the cycle, while this cart does it on the VIC half. |
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JackAsser
Registered: Jun 2002 Posts: 1990 |
Quote: Isn't this a similar technique what SuperCPU actually does on the C64 bus?
This is more similar to the 2Mhz mode on C128. |
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Krill
Registered: Apr 2002 Posts: 2852 |
Internal 6510 is stalled most/all of the time by the DMA, isn't it? |
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Laurent
Registered: Apr 2004 Posts: 40 |
The cart handles both phases of the cycle CPU & VIC, but unlike the SuperCPU or a FPGA-based CPU, the cart CPU cannot be synchronous to the clock and still be efficient.
The GPIOs are slow so the "c64 bus handler" loop cannot do anything too fancy. Writing or reading prepared data to/from the bus is fine, but not having actual code or CPU emulation there.
So the prepared data are altered in another core of the cart CPU, every frame. By prepared data, i mean a sort of "copper" for the CPU cycle and a "VIC feeder" for the VIC cycle.
Like Krill mentioned, for the copper to be allowed to read/write the bus, DMA must be turned ON (6510 stalled), and to handle data to the VIC, ULTIMAX mode must be ON with A15 low so that RAM is masked from VIC.
(In fact, i am not sure what role should be left to the c64's 6510 and RAM with this cartridge)
So far in all the test examples i have posted on youtube, the code that alters the copper & vic feeder structures and access flash is written in C, compiled for the cart's ARM core and is also mixed with the rest of the firmware.
I understand this is not viable for release, and ideally the cartridge would be supportable by VICE.
I'm working on some way for people to write their code and access the cart features via functions, like allocating memory in the cart, reading/writing flash, moving memory, doing simple logic/math operations on array of data (int & float32), then drawing lines, filling triangles, etc..
The question is what CPU(s) should be made available on the cart for the user ?
I have a simple non cycle-based 6510 emu that i have already used to play SID tunes without involving the C64's 6510 (then the copper updates the C64 SID registers).
But for the main demo/game code, i feel a more powerful CPU would be neat so the code could be written in C with 32bits support.
So I started using the Cortex M0 instruction set in thumb mode only, it quite simple to emulate this small CPU for an emulator, and it runs natively on the cart.
To write code, the user uses a .h and a symbol file for the functions, then uses GCC.
Well, at least that's my plan for now ! |
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chatGPZ
Registered: Dec 2001 Posts: 11136 |
i'd probably prefer some kind of fixed function pipeline that the C64 CPU can setup and use.... writing the payload in C for an ARM cpu just feels wrong :) |
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