| |
Ben
Account closed
Registered: Feb 2003
Posts: 163 |
Free cycles in raster line..
Is there some sort of stable, line dense raster leaving some cycles per line free which can then be filled with instructions executed outside the IRQ?
|
|
... 15 posts hidden. Click here to view all posts....
|
| |
Ben
Account closed
Registered: Feb 2003
Posts: 163 |
Quote: I can't seem to find how to make the timer count upwards though, so maybe I mixed something up here. :P I'm pretty sure I saw someone do this using a jmp ($dc04) though.
Will (and if so when) $dc05 be reset?
I reckon that if the code you are executing is dynamic, you'd have to repeat this trick each line (rather than synchronizing it once for the whole raster).
|
| |
tlr
Registered: Sep 2003
Posts: 1790 |
Quote: Will (and if so when) $dc05 be reset?
I reckon that if the code you are executing is dynamic, you'd have to repeat this trick each line (rather than synchronizing it once for the whole raster).
Or duplicating your code for every rasterline evenly spaced in memory, which I was trying to say above.
But I'm not sure you can make it count upwards.
You could ofcourse do it with just one NMI timer set to cycle mode ($3e), and make a jump to ($dd03). This way you will get to a routine in a separate page depending on how late you are.
$dd03 is the data direction register for the user port, setting it to $00 would be safe because '0' means input.
Putting $4c into $dd02 could work also, but you will mess up stuff with the serial bus. |
| |
Copyfault
Registered: Dec 2001
Posts: 478 |
Like Werner said: check out Ninja's 2x2-FLI-Routine in his and Oswalds Demo "Real". Ninja wrote some details about it in VN issue 43. The basic idea is to put $04/$dc in $fffe/$ffff and set timer A to lo=$4c hi=$xx. Then let Timer B trigger the NMI continously, starting with $3e. When the IRQ is called, the CPU reads some jmp $($3e-jitter)xx; now you just have to put 8 different jitter_correction_routines at the appropriate mem_areas. This way you get around the prob that timers do ALWAYS decrease; counting upwards sounds very new to me;)) And, ofcourse, it's the cheapest you can get concerning the "penalty cycles".
Check out VN#43 for details! |
| |
Ben
Account closed
Registered: Feb 2003
Posts: 163 |
Quote: Like Werner said: check out Ninja's 2x2-FLI-Routine in his and Oswalds Demo "Real". Ninja wrote some details about it in VN issue 43. The basic idea is to put $04/$dc in $fffe/$ffff and set timer A to lo=$4c hi=$xx. Then let Timer B trigger the NMI continously, starting with $3e. When the IRQ is called, the CPU reads some jmp $($3e-jitter)xx; now you just have to put 8 different jitter_correction_routines at the appropriate mem_areas. This way you get around the prob that timers do ALWAYS decrease; counting upwards sounds very new to me;)) And, ofcourse, it's the cheapest you can get concerning the "penalty cycles".
Check out VN#43 for details!
Will do! Thanks! |
| |
tlr
Registered: Sep 2003
Posts: 1790 |
Quote: Like Werner said: check out Ninja's 2x2-FLI-Routine in his and Oswalds Demo "Real". Ninja wrote some details about it in VN issue 43. The basic idea is to put $04/$dc in $fffe/$ffff and set timer A to lo=$4c hi=$xx. Then let Timer B trigger the NMI continously, starting with $3e. When the IRQ is called, the CPU reads some jmp $($3e-jitter)xx; now you just have to put 8 different jitter_correction_routines at the appropriate mem_areas. This way you get around the prob that timers do ALWAYS decrease; counting upwards sounds very new to me;)) And, ofcourse, it's the cheapest you can get concerning the "penalty cycles".
Check out VN#43 for details!
Putting the jump into $dc04/05 and trigger using timer B was a neat trick. Otherwise basically what I said in my last post.
Timers counting up... sorry for that. :P
It's been a really long time since I messed with this.
|
| |
Ben
Account closed
Registered: Feb 2003
Posts: 163 |
Quote: Putting the jump into $dc04/05 and trigger using timer B was a neat trick. Otherwise basically what I said in my last post.
Timers counting up... sorry for that. :P
It's been a really long time since I messed with this.
TLR, thanks for your advice! |
| |
Krill
Registered: Apr 2002
Posts: 2980 |
Also consider putting the rti instruction to $dd0c, then jmp $dd0c (the worthless serial shift register) at the end of your nmi handler. Since the cpu fetches at least 2 bytes for _every_ instruction (just that the 2nd byte is dismissed for 1-byte commands), the cpu acks the nmi by this implicit $dd0d read. Saves one (1) cycle comparing to lda $dd0d:rti :D Don't forget to do lda #$bf:and $dd0e:sta $dd0e to set the serial shift reg to input and use it as actual data storage to read and write. This technique is described in http://www.ffd2.com/fridge/chacking/c=hacking7.txt |
| |
Ben
Account closed
Registered: Feb 2003
Posts: 163 |
Quote: Also consider putting the rti instruction to $dd0c, then jmp $dd0c (the worthless serial shift register) at the end of your nmi handler. Since the cpu fetches at least 2 bytes for _every_ instruction (just that the 2nd byte is dismissed for 1-byte commands), the cpu acks the nmi by this implicit $dd0d read. Saves one (1) cycle comparing to lda $dd0d:rti :D Don't forget to do lda #$bf:and $dd0e:sta $dd0e to set the serial shift reg to input and use it as actual data storage to read and write. This technique is described in http://www.ffd2.com/fridge/chacking/c=hacking7.txt
Good idea!
(To be frank with you all: I am not working on something at the moment (too busy with other stuff, regretfully), but I am intrigued by the technology.. ) |
| |
WVL
Registered: Mar 2002
Posts: 902 |
Quote: Also consider putting the rti instruction to $dd0c, then jmp $dd0c (the worthless serial shift register) at the end of your nmi handler. Since the cpu fetches at least 2 bytes for _every_ instruction (just that the 2nd byte is dismissed for 1-byte commands), the cpu acks the nmi by this implicit $dd0d read. Saves one (1) cycle comparing to lda $dd0d:rti :D Don't forget to do lda #$bf:and $dd0e:sta $dd0e to set the serial shift reg to input and use it as actual data storage to read and write. This technique is described in http://www.ffd2.com/fridge/chacking/c=hacking7.txt
hey! I didnt know this one yet :)
have to check if ninja also used this (but i think that's very probable..) |
| |
Ninja
Registered: Jan 2002
Posts: 411 |
Well, I know this trick, but I didn't use it in the 2x2-routine. Simply didn't think of it at that time, hehe, you can't remember 'em all, I guess :) Wouldn't save too many cycles anyway, as in most cases the BIT $DD0D is executed before the badline. Still, I think it's worth implementing it. |
| Previous - 1 | 2 | 3 - Next |
