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JackAsser
Registered: Jun 2002
Posts: 2014 |
Writes to $00 / $01
When you write to $00 and $01, are these writes also issued on the memory bus?
To test on the real thing, simply enable bitmap mode and point the VIC-bank to #$03 ($0000-$3fff). Then write to $00 and $01, if the memory writes are issued then the two first bytes on the bit map will change. I don't have my setup up and running, could someone please test it.
@Gideon: If this works then this will enable you to know indirectly the state of $00 and $01 and thus be able to switch I/O-Address decoding on/off for f.e. SID-emulation. |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
Quote:To test on the real thing, simply enable bitmap mode and point the VIC-bank to #$03 ($0000-$3fff). Then write to $00 and $01, if the memory writes are issued then the two first bytes on the bit map will change. I don't have my setup up and running, could someone please test it.
that was tested long ago... marko did it if i recall correctly. (yes it works) |
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JackAsser
Registered: Jun 2002
Posts: 2014 |
@Groepaz: \o/ Hurray for SID-emulation core in 1541u then! (and other I/O stuff). |
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Frantic
Registered: Mar 2003
Posts: 1648 |
http://codebase64.org/doku.php?id=magazines:chacking7#hiding_ki.. |
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Oswald
Registered: Apr 2002
Posts: 5094 |
mmm... this makes me remember an article which claimed that if you read 00/01 on the same cycle the VIC does you will read the ram (iirc) |
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Krill
Registered: Apr 2002
Posts: 2980 |
Sounds like nonsense. :)
The 6510 just catches any read-accesses on $00 and $01 and gives you the contents of their respective registers in the CPU, no matter what the VIC is currently doing. Besides, the CPU and the VIC access the bus on different edges of the clock signal. (Except when the CPU is stalled and the VIC does 2 reads per clock cycle.) |
