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Forums > C64 Coding > Picture without badlines.
2018-02-08 10:15
Golara

Registered: Jan 2018
Posts: 206
Picture without badlines.

In the last part of Time Machine by Booze Design HCL says that the picture looks very colorful despite not having any badlines. How is that possible to have pictures without badlines ? Lack of badlines causes FLD effect, right ?
 
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2019-11-14 09:02
Oswald

Registered: Apr 2002
Posts: 4608
so no way to have *any* kind of gfx for a bigger area (stretched or not whatever) and open sideborder and 8 sprites ?
2019-11-14 11:03
HCL

Registered: Feb 2003
Posts: 693
Nope.. 3:rd part of Time Machine is pretty maxed out.. Different colors in each char "column", extended into sideborder using sprites and 12 moving sprites on top.

The last part looks similar, only the graphics is FPD-stretched there. Helluvalot more complicated :P
2019-11-15 03:39
Peacemaker

Registered: Sep 2004
Posts: 191
have a part that exacatly does what the threadcreator is asking for plus some "effect" on it.
maybe one day ill release the little demo along some other parts.
2019-11-15 10:03
Krill

Registered: Apr 2002
Posts: 1522
Quoting Oswald
so no way to have *any* kind of gfx for a bigger area (stretched or not whatever) and open sideborder and 8 sprites ?
Pretty sure it's one of the things that are possible on machines with 65 cycles per line, i.e., new NTSC and PAL N, but not on Euro-PAL.
The following is a conjecture, i'm not aware of existing productions and haven't tested it myself yet.

The two extra cycles go there: in the right border, sprite 0 fetch starts one cycle later than on 63-cycles PAL (thus no need for RMW $d016 instructions to have 8 sprites and open sideborders), and in the left border on the next rasterline, sprite 7 fetch ends one cycle earlier with regard to the clear-RC condition, as a rasterline has 2 more cycles and sprite fetches are back to back.

Due to the latter extra cycle, there are 4 and not just 3 cycles between sprite 7 fetch and the clear RC condition check. A store to $d011 would neatly fit in there to abort the badline condition and cause RC not to be reset, effectively triggering linecrunch.

So, open sideborders with 8 sprites AND linecrunching should be possible, just not on Euro-PAL.
2019-11-15 12:23
Rastah Bar

Registered: Oct 2012
Posts: 229
According to http://unusedino.de/ec64/technical/aay/c64/victnl.htm both extra cycles are just before the sprit 0 fetch.
2019-11-15 13:15
Krill

Registered: Apr 2002
Posts: 1522
Quoting Rastah Bar
According to http://unusedino.de/ec64/technical/aay/c64/victnl.htm both extra cycles are just before the sprit 0 fetch.
This assertion appears to stem from Christian Bauer's venerated VIC article, which claims the same.

However, according to VICE sourcecode found in https://sourceforge.net/p/vice-emu/code/HEAD/tree/trunk/vice/sr.. we see

PAL: 3 cycles between sprite 7 fetch and UpdateVC
    { Phi1(10), 0x1dc, None,    SprDma1(7), BaSpr1(7),       None                 },
    { Phi2(10), 0x1e0, None,    SprDma2(7), BaSpr1(7),       None                 },
    { Phi1(11), 0x1e4, None,    Refresh,    None,            None                 },
    { Phi2(11), 0x1e8, None,    None,       None,            None                 },
    { Phi1(12), 0x1ec, None,    Refresh,    BaFetch,         None                 },
    { Phi2(12), 0x1f0, None,    None,       BaFetch,         None                 },
    { Phi1(13), 0x1f4, None,    Refresh,    BaFetch,         None                 },
    { Phi2(13), 0x000, None,    None,       BaFetch,         None                 },
    { Phi1(14), 0x004, None,    Refresh,    BaFetch,         None                 },
    { Phi2(14), 0x008, None,    None,       BaFetch,         UpdateVc             },
NTSC: 4 cycles between sprite 7 fetch and UpdateVC
    { Phi1(9),  0x1dc, None,    SprDma1(7), BaSpr1(7),       None                 },
    { Phi2(9),  0x1e0, None,    SprDma2(7), BaSpr1(7),       None                 },
    { Phi1(10), 0x1e4, None,    Idle,       None,            None                 },
    { Phi2(10), 0x1e8, None,    None,       None,            None                 },
    { Phi1(11), 0x1ec, None,    Refresh,    None,            None                 },
    { Phi2(11), 0x1f0, None,    None,       None,            None                 },
    { Phi1(12), 0x1f4, None,    Refresh,    BaFetch,         None                 },
    { Phi2(12), 0x1f8, None,    None,       BaFetch,         None                 },
    { Phi1(13), 0x1fc, None,    Refresh,    BaFetch,         None                 },
    { Phi2(13), 0x000, None,    None,       BaFetch,         None                 },
    { Phi1(14), 0x004, None,    Refresh,    BaFetch,         None                 },
    { Phi2(14), 0x008, None,    None,       BaFetch,         UpdateVc             },
and

PAL: No extra cycle before sprite 0 fetch
    { Phi1(54), 0x144, Vis(37), FetchG,     BaFetch,         None                 },
    { Phi2(54), 0x148, Vis(38), FetchC,     BaFetch,         None                 },
    { Phi1(55), 0x14c, Vis(38), FetchG,     BaSpr1(0),       ChkSprDma            },
    { Phi2(55), 0x150, Vis(39), None,       BaSpr1(0),       None                 },
    { Phi1(56), 0x154, Vis(39), Idle,       BaSpr1(0),       ChkSprDma            },
    { Phi2(56), 0x158, None,    None,       BaSpr1(0),       ChkBrdR0 | ChkSprExp },
NTSC: One extra cycle before sprite 0 fetch
    { Phi1(54), 0x144, Vis(37), FetchG,     BaFetch,         None                 },
    { Phi2(54), 0x148, Vis(38), FetchC,     BaFetch,         None                 },
    { Phi1(55), 0x14c, Vis(38), FetchG,     None,            None                 },
    { Phi2(55), 0x150, Vis(39), None,       None,            None                 },
    { Phi1(56), 0x154, Vis(39), Idle,       BaSpr1(0),       ChkSprDma            },
    { Phi2(56), 0x158, None,    None,       BaSpr1(0),       ChkBrdR0 | ChkSprExp },
    { Phi1(57), 0x15c, None,    Idle,       BaSpr1(0),       ChkSprDma            },
    { Phi2(57), 0x160, None,    None,       BaSpr1(0),       ChkBrdR1             },
These days, i'm trusting VICE more on these matters than the VIC article.

But ultimately, real hardware is the authority there. =)
(Now, if i only had a 65-cycle machine and not just the 64-cycle old NTSC one and plenty of Euro-PAL machines...)
2019-11-15 13:28
Rastah Bar

Registered: Oct 2012
Posts: 229
Interesting. Does this mean that 7 sprites over FLI is not possible on NTSC?
2019-11-15 13:34
Krill

Registered: Apr 2002
Posts: 1522
If anything, i'd expect NTSC to allow for more sprites over FLI than PAL, not fewer. :)
2019-11-15 14:58
Golara

Registered: Jan 2018
Posts: 206
Quote: Quoting Rastah Bar
According to http://unusedino.de/ec64/technical/aay/c64/victnl.htm both extra cycles are just before the sprit 0 fetch.
This assertion appears to stem from Christian Bauer's venerated VIC article, which claims the same.

However, according to VICE sourcecode found in https://sourceforge.net/p/vice-emu/code/HEAD/tree/trunk/vice/sr.. we see

PAL: 3 cycles between sprite 7 fetch and UpdateVC
    { Phi1(10), 0x1dc, None,    SprDma1(7), BaSpr1(7),       None                 },
    { Phi2(10), 0x1e0, None,    SprDma2(7), BaSpr1(7),       None                 },
    { Phi1(11), 0x1e4, None,    Refresh,    None,            None                 },
    { Phi2(11), 0x1e8, None,    None,       None,            None                 },
    { Phi1(12), 0x1ec, None,    Refresh,    BaFetch,         None                 },
    { Phi2(12), 0x1f0, None,    None,       BaFetch,         None                 },
    { Phi1(13), 0x1f4, None,    Refresh,    BaFetch,         None                 },
    { Phi2(13), 0x000, None,    None,       BaFetch,         None                 },
    { Phi1(14), 0x004, None,    Refresh,    BaFetch,         None                 },
    { Phi2(14), 0x008, None,    None,       BaFetch,         UpdateVc             },
NTSC: 4 cycles between sprite 7 fetch and UpdateVC
    { Phi1(9),  0x1dc, None,    SprDma1(7), BaSpr1(7),       None                 },
    { Phi2(9),  0x1e0, None,    SprDma2(7), BaSpr1(7),       None                 },
    { Phi1(10), 0x1e4, None,    Idle,       None,            None                 },
    { Phi2(10), 0x1e8, None,    None,       None,            None                 },
    { Phi1(11), 0x1ec, None,    Refresh,    None,            None                 },
    { Phi2(11), 0x1f0, None,    None,       None,            None                 },
    { Phi1(12), 0x1f4, None,    Refresh,    BaFetch,         None                 },
    { Phi2(12), 0x1f8, None,    None,       BaFetch,         None                 },
    { Phi1(13), 0x1fc, None,    Refresh,    BaFetch,         None                 },
    { Phi2(13), 0x000, None,    None,       BaFetch,         None                 },
    { Phi1(14), 0x004, None,    Refresh,    BaFetch,         None                 },
    { Phi2(14), 0x008, None,    None,       BaFetch,         UpdateVc             },
and

PAL: No extra cycle before sprite 0 fetch
    { Phi1(54), 0x144, Vis(37), FetchG,     BaFetch,         None                 },
    { Phi2(54), 0x148, Vis(38), FetchC,     BaFetch,         None                 },
    { Phi1(55), 0x14c, Vis(38), FetchG,     BaSpr1(0),       ChkSprDma            },
    { Phi2(55), 0x150, Vis(39), None,       BaSpr1(0),       None                 },
    { Phi1(56), 0x154, Vis(39), Idle,       BaSpr1(0),       ChkSprDma            },
    { Phi2(56), 0x158, None,    None,       BaSpr1(0),       ChkBrdR0 | ChkSprExp },
NTSC: One extra cycle before sprite 0 fetch
    { Phi1(54), 0x144, Vis(37), FetchG,     BaFetch,         None                 },
    { Phi2(54), 0x148, Vis(38), FetchC,     BaFetch,         None                 },
    { Phi1(55), 0x14c, Vis(38), FetchG,     None,            None                 },
    { Phi2(55), 0x150, Vis(39), None,       None,            None                 },
    { Phi1(56), 0x154, Vis(39), Idle,       BaSpr1(0),       ChkSprDma            },
    { Phi2(56), 0x158, None,    None,       BaSpr1(0),       ChkBrdR0 | ChkSprExp },
    { Phi1(57), 0x15c, None,    Idle,       BaSpr1(0),       ChkSprDma            },
    { Phi2(57), 0x160, None,    None,       BaSpr1(0),       ChkBrdR1             },
These days, i'm trusting VICE more on these matters than the VIC article.

But ultimately, real hardware is the authority there. =)
(Now, if i only had a 65-cycle machine and not just the 64-cycle old NTSC one and plenty of Euro-PAL machines...)


At least we have (almost) 1:1 pixel aspect ratio :P NTSC is gross... 60FPS is nice though, especially on any emulator, 50FPS on a 60Hz monitor sucks ass :/
2019-11-15 15:24
Krill

Registered: Apr 2002
Posts: 1522
PAL N then, best of all worlds! (Except 60 Hz.) =)
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