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2008-04-08 22:51

gregg
Account closed

Registered: Apr 2005
Posts: 56

Some sort of multithreading.

About a week ago the topic multithreading came up on #c-64. So today I gave it a try. However, there's something wrong with my code and I can't really figure out what it is.

A short description: I have a fixed number of threads running and a CIA IRQ deals with context switching in a round-robin fashion. Every IRQ I save all current state data (SP, status register, PC, A, X, Y) in a structure and fetch the state data for the next thread.

In this example the first thread increments the screen background color (fast), while the second thread changes the border background color (slow). However the wait in the second thread runs too fast every other time, and I have no idea why. It's probably something wrong with the context switch stuff, maybe some of you could take a look at it?

Sources are for ACME.

!to "threading.prg",cbm
!cpu 6510
;!source "mylib.a"
!macro basic_header .a, .b, .c, .d {
        *= $0801
        !byte <.eol,>.eol,0,0,$9e
        !text .a, .b, .c, .d
.eol:   !byte 0,0,0
}

num_threads = 2
thread_num = $fd		; current thread number

;--------------------------------------------------------------------------
+basic_header "2", "0", "6", "1"

*= $080d

init:	sei
		; set up context switch IRQ
		lda #$35
		sta $01

		lda #<context_switch
		ldx #>context_switch
		sta $fffe
		stx $ffff
		
		lda #0
		sta thread_num

		cli
		jmp thread1

;--------------------------------------------------------------------------
context_switch:
		pha
		txa
		pha
		tya
		pha
		lda $dc0d

		; save current thread
		lda thread_num
		; *8
		asl
		asl
		asl
		tay
		; save A,X,Y
		pla
		sta thread_data+6,y
		pla
		sta thread_data+5,y
		pla
		sta thread_data+4,y
		; save PSW
		pla
		sta thread_data+1,y
		; save PC
		pla
		sta thread_data+2,y
		pla
		sta thread_data+3,y
		; save SP
		tsx
		txa
		sta thread_data,y

		; next thread, wraparound
		ldy thread_num
		iny
		cpy #num_threads
		bne +
		ldy #0
+		sty thread_num

		; *8
		tya
		asl
		asl
		asl
		tay

		; restore thread data
		; stack pointer first
		lda thread_data,y
		tax
		txs
		; push PC, PSW for RTI
		lda thread_data+3,y
		pha
		lda thread_data+2,y
		pha
		lda thread_data+1,y
		pha
		; push registers
		lda thread_data+6,y
		pha
		lda thread_data+5,y
		pha
		lda thread_data+4,y
		pha

		pla
		tay
		pla
		tax
		pla
		rti
	
;--------------------------------------------------------------------------
thread1:
		inc $d021
		ldy #$02
		jsr wait2
		jmp thread1


thread2:
		inc $d020
		ldy #$80
		jsr wait2
		jmp thread2
		
wait2:
-		ldx #0
		dex
		bne *-1
		dey
		bne -
		rts

;--------------------------------------------------------------------------
thread_data:
	!fill 8, 0
	!byte $ff-$40, $22, <thread2, >thread2, 0,0,0,0

... 211 posts hidden. Click here to view all posts....

2008-04-15 14:37

Oswald

Registered: Apr 2002
Posts: 5031

Quote: That link does not disprove what I have been writing. By posting that link you are demonstrating that you do not understand the subtle differences, Groepaz pointed this out as well.

I already defined what is meant by "operating level" in posts 80 and 85. You are incorrectly conflating privilege level with operating level by introducing different terminology compared to what I have been using.

You need to completely ignore anything you have been writing about privilege levels because it is not relevant to what I have been posting.

oh my dear. read post #102 then. according to google & wp search engines operation modes == privileges and stuff.

I can also define that irqs are fruitcakes and then engage in endless stupid arguments, but how about just agreeing on what wp&google says?

running in an irq is not different in any way to normal "mode" anyway. I can sei/cli in both "modes" and there's no way to determine if the cpu is running in irq or "main program. thus 2 things that have nothing in difference are the same thing.

2008-04-15 14:39

Oswald

Registered: Apr 2002
Posts: 5031

Quote: I remember I used multi-threading for a GUI OS on the 64 back in 1991 or '92, I can't remember exactly when. Back then I called it multitasking of course since that is what the Amiga called it.

This had memory management used to allocate memory for each process and when the "EXE" was loaded the OS would relocate the code for you.

multithreading = "multitasking" within a task which is running in a multitasking enviroment.

read Wikipedia. it will help you clear up the mess in your head.

2008-04-15 15:28

Skate

Registered: Jul 2003
Posts: 492

If some people agreed that multi-threading really possible on c64, then let's move this argument to the next level.

Should we call using 1541 for simultaneous calculations hyper-threading (if we use it the correct way)?

2008-04-15 15:38

Martin Piper

Registered: Nov 2007
Posts: 647

Again Oswald what you are posting does not in any way disprove or refute what I have been posting, for the reasons already given "privilege levels" are not what I have been posting about. By posting those links you are again demonstrating that you don't know enough about the subject being discussed.

2008-04-15 15:42

Martin Piper

Registered: Nov 2007
Posts: 647

Quote: oh my dear. read post #102 then. according to google & wp search engines operation modes == privileges and stuff.

I can also define that irqs are fruitcakes and then engage in endless stupid arguments, but how about just agreeing on what wp&google says?

running in an irq is not different in any way to normal "mode" anyway. I can sei/cli in both "modes" and there's no way to determine if the cpu is running in irq or "main program. thus 2 things that have nothing in difference are the same thing.

"according to google & wp search engines operation modes == privileges and stuff."

I wrote "operating levels". You were the one who started with all this modes stuff. I also definied that is meant by the term "operating levels" in the context of this topic in my earlier posts.

"running in an irq is not different in any way to normal "mode" anyway."

You are wrong, as already explained running with the interrupt disable flag set means that the flow of instructions cannot be interrupted by an IRQ. This is the key difference between the two 6502 operating levels.

Those links from Wikipedia are talking about something else and are not relevant to this specific topic.

2008-04-15 16:00

Martin Piper

Registered: Nov 2007
Posts: 647

As for this comment: "I can sei/cli in both "modes" and there's no way to determine if the cpu is running in irq or "main program."

By executing sei or cli you are changing the operating level of the CPU between disabling or allowing the IRQ line to interrupt the instruction execution flow.

Perhaps you would like to try this simple program which demonstrates why you are wrong.
sei
php
pla
sta $0401
cli
php
pla
sta $0402
rts

Obviously this stores different values to $401 and $402 depending on what the interrupt disable bit says, this demonstrates how to detect if the CPU is currently in disable mode (IRQ mode) or IRQ enable (mainline mode).

"thus 2 things that have nothing in difference are the same thing."

Since the instruction execution changes if the interrupt disable bit is clear and the IRQ line goes low, then you're wrong.

Since your assumption is wrong, your conclusion is also wrong.

2008-04-15 17:24

Oswald

Registered: Apr 2002
Posts: 5031

Quote: If some people agreed that multi-threading really possible on c64, then let's move this argument to the next level.

Should we call using 1541 for simultaneous calculations hyper-threading (if we use it the correct way)?

if some people agreed that the earth is flat, then let's move this argument to the next level: why doesnt oceans poor down at the edges of the world ? there shoud be a ring of mountains to hold the water. yes! :)

2008-04-15 17:45

Oswald

Registered: Apr 2002
Posts: 5031

Quote: "according to google & wp search engines operation modes == privileges and stuff."

I wrote "operating levels". You were the one who started with all this modes stuff. I also definied that is meant by the term "operating levels" in the context of this topic in my earlier posts.

"running in an irq is not different in any way to normal "mode" anyway."

You are wrong, as already explained running with the interrupt disable flag set means that the flow of instructions cannot be interrupted by an IRQ. This is the key difference between the two 6502 operating levels.

Those links from Wikipedia are talking about something else and are not relevant to this specific topic.

you are right, you have wrote about operating levels, searching for that doesnt gives any clear definition, so lets play with your definition from now on:

"6502 does have two operating levels, in the context of this subject. IRQ mode and the mainline mode"

reading the status of the I flag doesnt helps. Since you can issue a SEI/CLI regardless you're in "irq" or "mainline" "mode", there's no way to tell the difference. you can never tell if the I flag was set by code or HW.

"Since the instruction execution changes if the interrupt disable bit is clear and the IRQ line goes low, then you're wrong."

that can be parodized nicely: since the instruction execution changes if the C/V/Z/M/B flag bit is clear then you're wrong. for example the code that has been jumped on by a BCC instuction is in 'c' bit set operating level. ;)

as there is no C/V/Z/M/B bit set/clear operating level on the 6510, so there is no I bit set/clear operating level.

2008-04-15 17:53

Oswald

Registered: Apr 2002
Posts: 5031

Hyper-Threading works by duplicating certain sections of the processorthose that store the architectural statebut not duplicating the main execution resources. This allows a Hyper-Threading equipped processor to pretend to be two "logical" processors to the host operating system, allowing the operating system to schedule two threads or processes simultaneously

2008-04-15 19:09

Stryyker

Registered: Dec 2001
Posts: 465

SEI does not change operating level. It only blocks IRQs. Interrupts can still happen - NMI. It is still an interrupt and can be used for task scheduling.

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