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TWW
Registered: Jul 2009
Posts: 545 |
Regarding Interrupts
I have some hypothetical questions regarding IRQ interrupts;
#1: If an IRQ event is pulsed (IRQ line pulled low) for a duration of 3-4 cycles and this happens during a 6-7 cycle instruction, can the IRQ be missed by the MPU?
#2: Are the IRQ-flags handled by the MPU or the chips in question (CIA#1/VICII) (I suspect the VIC/CIA)?
#3: If the answer to #1 is yes & #2 is CIA/VIC, would a "missed IRQ" still be flagged?
#4: If an IRQ remains unacknowledged will the latent IRQ event retrigger a interrupt on the CPU after an RTI?
#4.5 I have tested #4 and found it to re-trigger after 6 cycles. Can someone confirm and why 6 cycles?
#5: The interrupt initialization takes 7 cycles wheras the 2 first cycles are described as "internal functions" in a 6502 diagram I saw. What exactly is going on during these 2 clock cycles?
#6: If you ack CIA#1 with a LDA $dc0d, this operation takes 4 cycles. In whihc cycle does the flag(s) actually clear?
#7: Same as #6 just with LDA #$ff, STA $d019.
If there is some documentation around this I would be gratefull for some pointers. And yes I know some of these things could probably be tested and figgured out but hey what's a forum for^^ |
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Fresh
Registered: Jan 2005
Posts: 101 |
I've written some more (a bit tidier) code to test IRQ on CIA.
It works by using the timer in one shot mode and trying to create interrupts in different positions "inside" an ASL $DC0D,x instruction.
The program prints 8 "*" or " " on the first row of the screen:
- "*" means an IRQ has been fired (after the ASL)
- " " means no IRQ has been fired
On winvice I get four *: this clearly means that you can't suppress interrupts.
If you try this on a real machine and get a different result, please post!
(sys 4096)
*=$1000
ldy #$01
loop
sei
lda #<irq
sta $0314
lda #>irq
sta $0315
lda #$7e
sta $dc0d
lda #$7f
sta $dd0d
lda $dc0d
lda $dd0d
lda #$00
sta $dc0e
ldx #$00
stx $dc0d
cli
sty $dc04
stx $dc05
lda #$09
sta $dc0e
sta $ff
asl $dc0d,x
lda #$20
Exit
sta $03FF,y
iny
cpy #$09
bne loop
lda #$31
sta $0314
lda #$ea
sta $0315
jsr $fda3
rts
irq
tsx
txa
clc
adc #$06
tax
txs
lda #$2A
jmp Exit
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Graham
Account closed
Registered: Dec 2002
Posts: 990 |
Doesn't seem to work as supposed. No star.
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Fresh
Registered: Jan 2005
Posts: 101 |
Well, it looks like CIA irq needs to be revised.
No stars is what I was expecting: it means that the fourth cycle of ASL DC0D,x acks the interrupt and MPU doesn't get aware of the IRQ. Firing the IRQ in cycle 1,2 or 3 of ASL DC0D,x should indeed create a pulse like IRQ.
Edit: No stars with Hox64 with CIA 6526 (Not 6526A) |
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TWW
Registered: Jul 2009
Posts: 545 |
Interesting. Different results on VICE and the real thing. I wanted to double check the theory around an unack'ed IRQ retriggers and put together the folowing code (raster compare IRQ initialized with $d012 to #00 and $d011 to #$0b and jmp * as async. code):
irq1:
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff // 44 cycles
dec $d020 // 6 cycles
rti // 6 cycles
No pushing or pulling since regs remain untouched.
Now this results in "stable" colour bars all over the screen (as one would expect). This gives a total of 56 cycles spendt and with 7 cycles for the MPU to trigger the next IRQ this fits beutifully on a PAL setup.
However if remove a cycle by replacing a bit $ffff to a bit $ff i get this:
So what's so strange about this?
If you can count the number of 1 cycle too short lines across it adds up to 48... why 48 , shoudn't it be 63? |
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tlr
Registered: Sep 2003
Posts: 1790 |
There are some tests around this area here: http://vice-emu.svn.sourceforge.net/viewvc/vice-emu/testprogs/i..
I think emulation was improved in this respect after 2.2.
Posting binary versions of your test would be helpful.
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TWW
Registered: Jul 2009
Posts: 545 |
Here is the complete code for the straight lines:
sei
lda #$7f
sta $dc0d
sta $dd0d
lda $dc0d
lda $dd0d
lda #$01
sta $d01a
lda #$00
sta $d012
lda #$0b // Turn off screen
sta $d011
lda #$35
sta $01
lda #<irq
sta $fffe
lda #>irq
sta $ffff
cli
jmp *
irq1:
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
dec $d020
rti
And here it is for the messed up lines :)
sei
lda #$7f
sta $dc0d
sta $dd0d
lda $dc0d
lda $dd0d
lda #$01
sta $d01a
lda #$00
sta $d012
lda #$0b // Turn off screen
sta $d011
lda #$35
sta $01
lda #<irq
sta $fffe
lda #>irq
sta $ffff
cli
jmp *
irq1:
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ffff
bit $ff
dec $d020
rti
You can put it at $1000. Should be allowed to attach "small" binaries to the forums. would make things more easy^^ If you have problems compiling this, drop me a line (tww@[nofuckingspam]creators.no). |
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tlr
Registered: Sep 2003
Posts: 1790 |
I've checked your screen shot. You are drawing the wrong conclusions.
Start on a line where the split is visible.
Count the number of lines until the next line with the split in the same horizontal spot.
This should be 63.
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TWW
Registered: Jul 2009
Posts: 545 |
Oh I agree to that fact.
I was only thinking since I removed one cycle from the IRQ code the collor bar should be shortened by 1 cycle and thus displaying 63 breaks. Now 48 is shown and I am curious where the 15 remaining splitts are and why (if this is correct) is the collor bar shortened with more then 1 cycle.
Is it the same on the real thang or (as usual) have i totally missed something? |
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Frantic
Registered: Mar 2003
Posts: 1648 |
@TWW: Do you have the "debug" borders option turned on? If not, turn it on. I guess the 48 columns you see are the 40 screen columns + 4 columns border on each side. There is a huge area of the border which is not visible on a standard C64 screen and which is normally also hidden in VICE and other emulators. So, as I said, turn the debug borders option on to see the rest of the border. |
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tlr
Registered: Sep 2003
Posts: 1790 |
Exactly. All 63 cycles aren't in the visible area of a normal monitor. All 63 cycles aren't even in the output signal. |
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