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MagerValp
Registered: Dec 2001
Posts: 1078 |
FIFOgfx (with live C64 debugging)
A friend of mine built his own 6502 computer and he talked me into making a graphics card for it. I've connected my prototype via a cartridge to the C64, and a side effect of how I'm interfacing it means that the C64's memory is mirrored into a Raspberry Pi, making it possible to inspect its memory live. I realized that this might potentially be even more interesting than the main project, but I haven't had time to fully explore it as I'm focusing on finishing the gfxcore first. I've started releasing my project files on GitHub if anyone wants to play along:
https://github.com/MagerValp/fifogfx |
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Flavioweb
Registered: Nov 2011
Posts: 463 |
...of course maybe i miss something, but since there is a Z80 cpu cart for c64, isn't possible to build an hw with is own 6510 that is fully monitorable? |
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JackAsser
Registered: Jun 2002
Posts: 2014 |
Quote: ...of course maybe i miss something, but since there is a Z80 cpu cart for c64, isn't possible to build an hw with is own 6510 that is fully monitorable?
It's called Chameleon |
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oziphantom
Registered: Oct 2014
Posts: 490 |
It would be interesting if one of these could be made to work in the 64. http://stardot.org.uk/forums/viewtopic.php?f=44&t=9655 They have them working in BBCs and Atoms which are VIC less, so not a good test. |
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MagerValp
Registered: Dec 2001
Posts: 1078 |
Neat project! Stopping or single stepping is not an option with 6510 and VIC-II, but you could do tracing and memory inspection - sort of a mini logic analyzer. |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
well, you could even do stop or stepping.... with the kludge that the VIC would still "run" anyway. i *think* the PDS could actually do this. |
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MagerValp
Registered: Dec 2001
Posts: 1078 |
Stopping the CPU via a very long dummy DMA I guess? |
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JackAsser
Registered: Jun 2002
Posts: 2014 |
Quote: Stopping the CPU via a very long dummy DMA I guess?
Yes, "just" strobe the RDY-line |
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doynax
Account closed
Registered: Oct 2004
Posts: 212 |
Quoting JackAsserYes, "just" strobe the RDY-line Not a lot of use in a demo environment without restoring the VIC/CIA timer states afterwards though, otherwise the first breakpoint set in anything timing sensitive would be liable to desynchronize the system and you might as well capture and step through a passive trace instead.
Taking care to resume execution on a multiple of 63*312 cycles later would be a start at least. |
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chatGPZ
Registered: Dec 2001
Posts: 11386 |
for demostuff all you need is inc $d020 anyway :) |
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