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Krill
Registered: Apr 2002
Posts: 2982 |
Release id #197710 : Transwarp v0.64
General Q&A thread, also report problems and error logs here. |
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jcompton
Registered: Feb 2006
Posts: 70 |
Corner case report--
Hardware: Ultimate 64 running firmware v1.28 / 3.7
NTSC mode
Internally emulated 1541
Transwarp Game disk C
With stock ROMs:
Loading Spike behaves as intended.
With JiffyDOS:
When Spike finishes loading and the ding plays, although the speedometer feedback flashes briefly, the screen clears and goes to a READY. prompt top of screen (as though one has hit RS+RESTORE, etc.)
Spike does RUN just fine, however.
I can replicate this behavior on a cold start.
Can provide a documentary video on request. |
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Krill
Registered: Apr 2002
Posts: 2982 |
Quoting Capt'n ObviousThank you for this incredible feat.
Do you think it can be ported to the VIC-20 ?
Can it be done with the VIAs ? Might be possible. But then it's only sensible for expanded VIC-20, no? The 3.5 KB of the stock machine are filled quite swiftly with Soundemon's loader. =) |
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jcompton
Registered: Feb 2006
Posts: 70 |
(Additional detail: the load works as intended with Jiffy enabled if I naively use LOAD"*",8 and LOAD"SPIKE",8. The problem only occurs when I use wedge commands.) |
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chatGPZ
Registered: Dec 2001
Posts: 11391 |
probably best to check first if it does the same on real hardware :) |
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Krill
Registered: Apr 2002
Posts: 2982 |
Quoting jcomptonWith JiffyDOS: Ah, i have tested JiffyDOS compatbility in the early days of development, but forgot to re-check prior to release.
But i have different problems (in VICE): Spike loads and runs just fine, but Transwarp autoboot gets stuck.
Can be worked around by loading Transwarp (or Spike) with ,8 only (not ,8,1), then RUN.
Will contact you for testing the next version, then, but there is no release schedule yet. =) |
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Krill
Registered: Apr 2002
Posts: 2982 |
Quoting jcomptonThe problem only occurs when I use wedge commands.) Ah yes, can reproduce the issue with "%SPIKE" from installed Transwarp. |
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Krill
Registered: Apr 2002
Posts: 2982 |
Quoting Groepazprobably best to check first if it does the same on real hardware :) Usually yes, but that kind of stuff (custom ROMs) is almost always a software issue that can be perfectly reproduced and debugged in emulators.
In this case, i had to buffer and restore COMSAV from this list http://unusedino.de/ec64/technical/aay/c64/mapjd.htm to fix the wedge issue and not use a certain drive ROM routine in the boot code. =) |
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Krill
Registered: Apr 2002
Posts: 2982 |
User Comment
Submitted by GI-Joe [PM] on 23 November 2020
Wow, that's really fast. Unglaublich geiler shice ! what really deserves the name ;) But with the standard file format an x30 loader ? without hardware-gcr decoding or memory expansion in the floppy ? I'm very excited about these releases.
Will this also work with other devices at the same time on the iec bus like i.e. the trackloader by mafiosino ? The 2-rev fallback loader for standard format is planned to work just fine with multiple drives on the bus, just like Transwarp is currently. :) (There is heavy ATN usage, but ATN responders running in the passive drives have been invented: S.T.F.U.)
But how fast it will ultimately be, we'll see. Mafiosino's loader is the current reference there, but i am aiming for a different approach. |
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Capt'n Obvious
Account closed
Registered: May 2014
Posts: 4 |
@Krill thank you for the answer, of course I was thinking of VICs whith 40Kb of SRAM or even more via banking. But now you make me think about streaming, even on the 5Kb VIC. |
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Krill
Registered: Apr 2002
Posts: 2982 |
User Comment
Submitted by Sparta [PM] on 23 November 2020
A jaw dropping, innovative tool from the Loader King! I can't wait to check the code... I am sure it is full of gems. :) Thanks! =) Okay, here's one gem, as we have talked about this stuff a while ago.
Sending bytes over serial.
The traditional method to send over bitpairs is this:$1800 ----C-D- CLK and DATA
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vv
$DD00 DC------ go there.Note how both bits are one bit apart in the send register but directly adjacent in the receive register, and they swap order on the way.
Both issues are usually solved by pre-scrambling or using look-up tables to do the scrambling.
This is a bit cumbersome, as it takes cycles and memory for the scrambling, or special pre-scrambled storage formats.
Now here's the trick: using ATNA.$1800 ---DC-0- DATA and CLK
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vv
$DD00 DC------ go there.It's that simple! :D
Note that DATA OUT ($1800 bit 1) must be cleared, and that both methods presented here are performated with ATN being unasserted.
The new method works with ATN asserted (as does the traditional one), but then the usual EOR-bitflip (DATA and CLOCK signals going from drive to C-64 are inverted) is done only on CLK but not on DATA.
Now sending over complete bytes can be done like this:
; value to send is in accu, eor #$ff occurs on receiving side
rol
rol
rol
ldx #ATNA + CLKOUT
[...]; wait here for ready-to-receive signal
sax PB
ror
ror
sax PB
ror
ror
sax PB
ror
ror
sax PBNote how no lookup is required. Also both methods can be mixed for a byte, or the initial 3 RORs be removed, when data is pre-scrambled anyways, such that some bitpairs can be sent faster with just 6 cycles between updates. |
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